layerscape: make uImage with zImage for 32-bit kernel
[openwrt/openwrt.git] / target / linux / layerscape / patches-4.4 / 3232-arm64-dts-ls1043a-share-all-MSIs.patch
1 From 60eedf7a9512683e2a8a998863cc5942e9dbdae5 Mon Sep 17 00:00:00 2001
2 From: Minghuan Lian <Minghuan.Lian@nxp.com>
3 Date: Tue, 17 Jan 2017 17:32:39 +0800
4 Subject: [PATCH 08/13] arm64: dts: ls1043a: share all MSIs
5
6 Cherry-pick patchwork patch.
7
8 In order to maximize the use of MSI, a PCIe controller will share
9 all MSI controllers. The patch changes "msi-parent" to refer to all
10 MSI controller dts nodes.
11
12 Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
13 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
14 ---
15 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 6 +++---
16 1 file changed, 3 insertions(+), 3 deletions(-)
17
18 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
19 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
20 @@ -1033,7 +1033,7 @@
21 bus-range = <0x0 0xff>;
22 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
23 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
24 - msi-parent = <&msi1>;
25 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
26 #interrupt-cells = <1>;
27 interrupt-map-mask = <0 0 0 7>;
28 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
29 @@ -1058,7 +1058,7 @@
30 bus-range = <0x0 0xff>;
31 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
32 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
33 - msi-parent = <&msi2>;
34 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
35 #interrupt-cells = <1>;
36 interrupt-map-mask = <0 0 0 7>;
37 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
38 @@ -1083,7 +1083,7 @@
39 bus-range = <0x0 0xff>;
40 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
41 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
42 - msi-parent = <&msi3>;
43 + msi-parent = <&msi1>, <&msi2>, <&msi3>;
44 #interrupt-cells = <1>;
45 interrupt-map-mask = <0 0 0 7>;
46 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,