347dcc0d1f88a8e94ee345ec417bf39e70fa1da5
[openwrt/openwrt.git] / target / linux / malta / patches-3.6 / 001-MIPS-fix-CBUS-UART-irq.patch
1 From 132a7253fe87b1f4d71aab5abee3108a793234db Mon Sep 17 00:00:00 2001
2 From: Ralf Baechle <ralf@linux-mips.org>
3 Date: Tue, 13 Nov 2012 10:41:50 +0100
4 Subject: [PATCH] MIPS: Malta: Fix interupt number of CBUS UART.
5
6 The CBUS UART's interrupt number was wrong conflicting with the interrupt
7 being tied to the Intel PIIX4. Since the PIIX4's interrupt is registered
8 before the CBUS UART which is not being used on most systems this would
9 not be noticed.
10
11 Attempts to open the ttyS2 CBUS UART would result in:
12
13 genirq: Flags mismatch irq 18. 00000000 (serial) vs. 00010000 (XT-PIC cascade)
14 serial_link_irq_chain: request failed: -16 for irq: 18
15
16 Qemu was written to match the kernel so will need to be fixed also.
17
18 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
19 (cherry picked from commit fe2ccd4dcebd3c5e264af1705bb9b659972418cc)
20 ---
21 arch/mips/mti-malta/malta-platform.c | 2 +-
22 1 file changed, 1 insertion(+), 1 deletion(-)
23
24 --- a/arch/mips/mti-malta/malta-platform.c
25 +++ b/arch/mips/mti-malta/malta-platform.c
26 @@ -48,7 +48,7 @@ static struct plat_serial8250_port uart8
27 SMC_PORT(0x2F8, 3),
28 {
29 .mapbase = 0x1f000900, /* The CBUS UART */
30 - .irq = MIPS_CPU_IRQ_BASE + 2,
31 + .irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
32 .uartclk = 3686400, /* Twice the usual clk! */
33 .iotype = UPIO_MEM32,
34 .flags = CBUS_UART_FLAGS,