mediatek: add support for ZyXEL NWA50AX Pro
[openwrt/openwrt.git] / target / linux / mediatek / dts / mt7981b-zyxel-nwa50ax-pro.dts
1 /dts-v1/;
2
3 #include "mt7981.dtsi"
4
5 / {
6 model = "ZyXEL NWA50AX Pro";
7 compatible = "zyxel,nwa50ax-pro", "mediatek,mt7981";
8
9 aliases {
10 led-boot = &led_green;
11 led-failsafe = &led_red;
12 led-running = &led_green;
13 led-upgrade = &led_red;
14 serial0 = &uart0;
15 label-mac-device = &gmac1;
16 };
17
18 chosen {
19 stdout-path = "serial0:115200n8";
20 };
21
22 gpio-keys {
23 compatible = "gpio-keys";
24
25 reset {
26 label = "reset";
27 linux,code = <KEY_RESTART>;
28 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
29 };
30 };
31
32 leds {
33 compatible = "gpio-leds";
34
35 led_green: led@0 {
36 label = "green:system";
37 gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
38 };
39
40 led@1 {
41 label = "blue:system";
42 gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
43 };
44
45 led_red: led@2 {
46 label = "red:system";
47 gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
48 };
49 };
50 };
51
52 &uart0 {
53 status = "okay";
54 };
55
56 &watchdog {
57 status = "okay";
58 };
59
60 &eth {
61 pinctrl-names = "default";
62 pinctrl-0 = <&mdio_pins>;
63
64 status = "okay";
65
66 gmac1: mac@1 {
67 compatible = "mediatek,eth-mac";
68 reg = <1>;
69 phy-mode = "2500base-x";
70
71 phy-handle = <&phy0>;
72
73 nvmem-cells = <&macaddr_mrd_1fff8>;
74 nvmem-cell-names = "mac-address";
75 };
76 };
77
78 &mdio_bus {
79 reset-gpios = <&pio 12 GPIO_ACTIVE_LOW>;
80 reset-delay-us = <1500000>;
81 reset-post-delay-us = <1000000>;
82
83 phy0: ethernet-phy@5 {
84 reg = <5>;
85 compatible = "ethernet-phy-ieee802.3-c45";
86 };
87 };
88
89 &spi0 {
90 pinctrl-names = "default";
91 pinctrl-0 = <&spi0_flash_pins>;
92 status = "okay";
93
94 spi_nand: flash@0 {
95 #address-cells = <1>;
96 #size-cells = <1>;
97 compatible = "spi-nand";
98 reg = <0>;
99 spi-max-frequency = <52000000>;
100
101 spi-cal-enable;
102 spi-cal-mode = "read-data";
103 spi-cal-datalen = <7>;
104 spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
105 spi-cal-addrlen = <5>;
106 spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
107
108 spi-tx-buswidth = <4>;
109 spi-rx-buswidth = <4>;
110 mediatek,nmbm;
111 mediatek,bmt-max-ratio = <1>;
112 mediatek,bmt-max-reserved-blocks = <64>;
113
114 mediatek,bmt-remap-range =
115 <0x0 0x580000>,
116 <0xef00000 0xef80000>;
117
118 partitions {
119 compatible = "fixed-partitions";
120 #address-cells = <1>;
121 #size-cells = <1>;
122
123 partition@0 {
124 label = "BL2";
125 reg = <0x00000 0x0100000>;
126 read-only;
127 };
128
129 partition@100000 {
130 label = "u-boot-env";
131 reg = <0x0100000 0x0080000>;
132 };
133
134 factory: partition@180000 {
135 label = "Factory";
136 reg = <0x180000 0x0200000>;
137 read-only;
138
139 compatible = "nvmem-cells";
140 #address-cells = <1>;
141 #size-cells = <1>;
142
143 macaddr: macaddr@a {
144 reg = <0xa 0x6>;
145 };
146 };
147
148 partition@380000 {
149 label = "FIP";
150 reg = <0x380000 0x0200000>;
151 read-only;
152 };
153
154 partition@580000 {
155 label = "ubi";
156 reg = <0x580000 0x3200000>;
157 };
158
159 partition@3780000 {
160 label = "ubi_1";
161 reg = <0x3780000 0x3200000>;
162 read-only;
163 };
164
165 partition@6980000 {
166 label = "rootfs-data";
167 reg = <0x6980000 0x3c00000>;
168 read-only;
169 };
170
171 partition@a580000 {
172 label = "logs";
173 reg = <0xa580000 0x3a80000>;
174 read-only;
175 };
176
177 partition@e000000 {
178 label = "myzyxel";
179 reg = <0xe000000 0xf00000>;
180 read-only;
181 };
182
183 partition@ef00000 {
184 label = "bootconfig";
185 reg = <0xef00000 0x80000>;
186 };
187
188 partition@ef80000 {
189 label = "mrd";
190 reg = <0xef80000 0x80000>;
191 read-only;
192
193 compatible = "nvmem-cells";
194 #address-cells = <1>;
195 #size-cells = <1>;
196
197 macaddr_mrd_1fff8: macaddr@1fff8 {
198 reg = <0x1fff8 0x6>;
199 };
200 };
201 };
202 };
203 };
204
205 &pio {
206 spi0_flash_pins: spi0-pins {
207 mux {
208 function = "spi";
209 groups = "spi0", "spi0_wp_hold";
210 };
211 };
212
213 pwm_pins: pwm0-pins {
214 mux {
215 function = "pwm";
216 groups = "pwm0_1";
217 };
218 };
219 };
220
221 &wifi {
222 status = "okay";
223
224 mediatek,mtd-eeprom = <&factory 0x0>;
225 };