mediatek: add a new spi-nand driver for kernel 5.10
[openwrt/openwrt.git] / target / linux / mediatek / files-5.10 / drivers / mtd / mtk-snand / mtk-snand-def.h
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3 * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
4 *
5 * Author: Weijie Gao <weijie.gao@mediatek.com>
6 */
7
8 #ifndef _MTK_SNAND_DEF_H_
9 #define _MTK_SNAND_DEF_H_
10
11 #include "mtk-snand-os.h"
12
13 #ifdef PRIVATE_MTK_SNAND_HEADER
14 #include "mtk-snand.h"
15 #else
16 #include <mtk-snand.h>
17 #endif
18
19 struct mtk_snand_plat_dev;
20
21 enum snand_flash_io {
22 SNAND_IO_1_1_1,
23 SNAND_IO_1_1_2,
24 SNAND_IO_1_2_2,
25 SNAND_IO_1_1_4,
26 SNAND_IO_1_4_4,
27
28 __SNAND_IO_MAX
29 };
30
31 #define SPI_IO_1_1_1 BIT(SNAND_IO_1_1_1)
32 #define SPI_IO_1_1_2 BIT(SNAND_IO_1_1_2)
33 #define SPI_IO_1_2_2 BIT(SNAND_IO_1_2_2)
34 #define SPI_IO_1_1_4 BIT(SNAND_IO_1_1_4)
35 #define SPI_IO_1_4_4 BIT(SNAND_IO_1_4_4)
36
37 struct snand_opcode {
38 uint8_t opcode;
39 uint8_t dummy;
40 };
41
42 struct snand_io_cap {
43 uint8_t caps;
44 struct snand_opcode opcodes[__SNAND_IO_MAX];
45 };
46
47 #define SNAND_OP(_io, _opcode, _dummy) [_io] = { .opcode = (_opcode), \
48 .dummy = (_dummy) }
49
50 #define SNAND_IO_CAP(_name, _caps, ...) \
51 struct snand_io_cap _name = { .caps = (_caps), \
52 .opcodes = { __VA_ARGS__ } }
53
54 #define SNAND_MAX_ID_LEN 4
55
56 enum snand_id_type {
57 SNAND_ID_DYMMY,
58 SNAND_ID_ADDR = SNAND_ID_DYMMY,
59 SNAND_ID_DIRECT,
60
61 __SNAND_ID_TYPE_MAX
62 };
63
64 struct snand_id {
65 uint8_t type; /* enum snand_id_type */
66 uint8_t len;
67 uint8_t id[SNAND_MAX_ID_LEN];
68 };
69
70 #define SNAND_ID(_type, ...) \
71 { .type = (_type), .id = { __VA_ARGS__ }, \
72 .len = sizeof((uint8_t[]) { __VA_ARGS__ }) }
73
74 struct snand_mem_org {
75 uint16_t pagesize;
76 uint16_t sparesize;
77 uint16_t pages_per_block;
78 uint16_t blocks_per_die;
79 uint16_t planes_per_die;
80 uint16_t ndies;
81 };
82
83 #define SNAND_MEMORG(_ps, _ss, _ppb, _bpd, _ppd, _nd) \
84 { .pagesize = (_ps), .sparesize = (_ss), .pages_per_block = (_ppb), \
85 .blocks_per_die = (_bpd), .planes_per_die = (_ppd), .ndies = (_nd) }
86
87 typedef int (*snand_select_die_t)(struct mtk_snand *snf, uint32_t dieidx);
88
89 struct snand_flash_info {
90 const char *model;
91 struct snand_id id;
92 const struct snand_mem_org memorg;
93 const struct snand_io_cap *cap_rd;
94 const struct snand_io_cap *cap_pl;
95 snand_select_die_t select_die;
96 };
97
98 #define SNAND_INFO(_model, _id, _memorg, _cap_rd, _cap_pl, ...) \
99 { .model = (_model), .id = _id, .memorg = _memorg, \
100 .cap_rd = (_cap_rd), .cap_pl = (_cap_pl), __VA_ARGS__ }
101
102 const struct snand_flash_info *snand_flash_id_lookup(enum snand_id_type type,
103 const uint8_t *id);
104
105 struct mtk_snand_soc_data {
106 uint16_t sector_size;
107 uint16_t max_sectors;
108 uint16_t fdm_size;
109 uint16_t fdm_ecc_size;
110 uint16_t fifo_size;
111
112 bool bbm_swap;
113 bool empty_page_check;
114 uint32_t mastersta_mask;
115
116 const uint8_t *spare_sizes;
117 uint32_t num_spare_size;
118 };
119
120 enum mtk_ecc_regs {
121 ECC_DECDONE,
122 };
123
124 struct mtk_ecc_soc_data {
125 const uint8_t *ecc_caps;
126 uint32_t num_ecc_cap;
127 const uint32_t *regs;
128 uint16_t mode_shift;
129 uint8_t errnum_bits;
130 uint8_t errnum_shift;
131 };
132
133 struct mtk_snand {
134 struct mtk_snand_plat_dev *pdev;
135
136 void __iomem *nfi_base;
137 void __iomem *ecc_base;
138
139 enum mtk_snand_soc soc;
140 const struct mtk_snand_soc_data *nfi_soc;
141 const struct mtk_ecc_soc_data *ecc_soc;
142 bool snfi_quad_spi;
143 bool quad_spi_op;
144
145 const char *model;
146 uint64_t size;
147 uint64_t die_size;
148 uint32_t erasesize;
149 uint32_t writesize;
150 uint32_t oobsize;
151
152 uint32_t num_dies;
153 snand_select_die_t select_die;
154
155 uint8_t opcode_rfc;
156 uint8_t opcode_pl;
157 uint8_t dummy_rfc;
158 uint8_t mode_rfc;
159 uint8_t mode_pl;
160
161 uint32_t writesize_mask;
162 uint32_t writesize_shift;
163 uint32_t erasesize_mask;
164 uint32_t erasesize_shift;
165 uint64_t die_mask;
166 uint32_t die_shift;
167
168 uint32_t spare_per_sector;
169 uint32_t raw_sector_size;
170 uint32_t ecc_strength;
171 uint32_t ecc_steps;
172 uint32_t ecc_bytes;
173 uint32_t ecc_parity_bits;
174
175 uint8_t *page_cache; /* Used by read/write page */
176 uint8_t *buf_cache; /* Used by block bad/markbad & auto_oob */
177 int *sect_bf; /* Used by ECC correction */
178 };
179
180 enum mtk_snand_log_category {
181 SNAND_LOG_NFI,
182 SNAND_LOG_SNFI,
183 SNAND_LOG_ECC,
184 SNAND_LOG_CHIP,
185
186 __SNAND_LOG_CAT_MAX
187 };
188
189 int mtk_ecc_setup(struct mtk_snand *snf, void *fmdaddr, uint32_t max_ecc_bytes,
190 uint32_t msg_size);
191 int mtk_snand_ecc_encoder_start(struct mtk_snand *snf);
192 void mtk_snand_ecc_encoder_stop(struct mtk_snand *snf);
193 int mtk_snand_ecc_decoder_start(struct mtk_snand *snf);
194 void mtk_snand_ecc_decoder_stop(struct mtk_snand *snf);
195 int mtk_ecc_wait_decoder_done(struct mtk_snand *snf);
196 int mtk_ecc_check_decode_error(struct mtk_snand *snf);
197 int mtk_ecc_fixup_empty_sector(struct mtk_snand *snf, uint32_t sect);
198
199 int mtk_snand_mac_io(struct mtk_snand *snf, const uint8_t *out, uint32_t outlen,
200 uint8_t *in, uint32_t inlen);
201 int mtk_snand_set_feature(struct mtk_snand *snf, uint32_t addr, uint32_t val);
202
203 int mtk_snand_log(struct mtk_snand_plat_dev *pdev,
204 enum mtk_snand_log_category cat, const char *fmt, ...);
205
206 #define snand_log_nfi(pdev, fmt, ...) \
207 mtk_snand_log(pdev, SNAND_LOG_NFI, fmt, ##__VA_ARGS__)
208
209 #define snand_log_snfi(pdev, fmt, ...) \
210 mtk_snand_log(pdev, SNAND_LOG_SNFI, fmt, ##__VA_ARGS__)
211
212 #define snand_log_ecc(pdev, fmt, ...) \
213 mtk_snand_log(pdev, SNAND_LOG_ECC, fmt, ##__VA_ARGS__)
214
215 #define snand_log_chip(pdev, fmt, ...) \
216 mtk_snand_log(pdev, SNAND_LOG_CHIP, fmt, ##__VA_ARGS__)
217
218 /* ffs64 */
219 static inline int mtk_snand_ffs64(uint64_t x)
220 {
221 if (!x)
222 return 0;
223
224 if (!(x & 0xffffffff))
225 return ffs((uint32_t)(x >> 32)) + 32;
226
227 return ffs((uint32_t)(x & 0xffffffff));
228 }
229
230 /* NFI dummy commands */
231 #define NFI_CMD_DUMMY_READ 0x00
232 #define NFI_CMD_DUMMY_WRITE 0x80
233
234 /* SPI-NAND opcodes */
235 #define SNAND_CMD_RESET 0xff
236 #define SNAND_CMD_BLOCK_ERASE 0xd8
237 #define SNAND_CMD_READ_FROM_CACHE_QUAD 0xeb
238 #define SNAND_CMD_WINBOND_SELECT_DIE 0xc2
239 #define SNAND_CMD_READ_FROM_CACHE_DUAL 0xbb
240 #define SNAND_CMD_READID 0x9f
241 #define SNAND_CMD_READ_FROM_CACHE_X4 0x6b
242 #define SNAND_CMD_READ_FROM_CACHE_X2 0x3b
243 #define SNAND_CMD_PROGRAM_LOAD_X4 0x32
244 #define SNAND_CMD_SET_FEATURE 0x1f
245 #define SNAND_CMD_READ_TO_CACHE 0x13
246 #define SNAND_CMD_PROGRAM_EXECUTE 0x10
247 #define SNAND_CMD_GET_FEATURE 0x0f
248 #define SNAND_CMD_READ_FROM_CACHE 0x0b
249 #define SNAND_CMD_WRITE_ENABLE 0x06
250 #define SNAND_CMD_PROGRAM_LOAD 0x02
251
252 /* SPI-NAND feature addresses */
253 #define SNAND_FEATURE_MICRON_DIE_ADDR 0xd0
254 #define SNAND_MICRON_DIE_SEL_1 BIT(6)
255
256 #define SNAND_FEATURE_STATUS_ADDR 0xc0
257 #define SNAND_STATUS_OIP BIT(0)
258 #define SNAND_STATUS_WEL BIT(1)
259 #define SNAND_STATUS_ERASE_FAIL BIT(2)
260 #define SNAND_STATUS_PROGRAM_FAIL BIT(3)
261
262 #define SNAND_FEATURE_CONFIG_ADDR 0xb0
263 #define SNAND_FEATURE_QUAD_ENABLE BIT(0)
264 #define SNAND_FEATURE_ECC_EN BIT(4)
265
266 #define SNAND_FEATURE_PROTECT_ADDR 0xa0
267
268 #endif /* _MTK_SNAND_DEF_H_ */