mediatek: add v5.4 support
[openwrt/openwrt.git] / target / linux / mediatek / files-5.4 / drivers / net / phy / mtk / mt753x / mt753x_common.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Weijie Gao <weijie.gao@mediatek.com>
5 */
6
7 #include <linux/kernel.h>
8 #include <linux/delay.h>
9
10 #include "mt753x.h"
11 #include "mt753x_regs.h"
12
13 void mt753x_irq_enable(struct gsw_mt753x *gsw)
14 {
15 u32 val;
16 int i;
17
18 /* Record initial PHY link status */
19 for (i = 0; i < MT753X_NUM_PHYS; i++) {
20 val = gsw->mii_read(gsw, i, MII_BMSR);
21 if (val & BMSR_LSTATUS)
22 gsw->phy_link_sts |= BIT(i);
23 }
24
25 val = BIT(MT753X_NUM_PHYS) - 1;
26
27 mt753x_reg_write(gsw, SYS_INT_EN, val);
28 }
29
30 static void display_port_link_status(struct gsw_mt753x *gsw, u32 port)
31 {
32 u32 pmsr, speed_bits;
33 const char *speed;
34
35 pmsr = mt753x_reg_read(gsw, PMSR(port));
36
37 speed_bits = (pmsr & MAC_SPD_STS_M) >> MAC_SPD_STS_S;
38
39 switch (speed_bits) {
40 case MAC_SPD_10:
41 speed = "10Mbps";
42 break;
43 case MAC_SPD_100:
44 speed = "100Mbps";
45 break;
46 case MAC_SPD_1000:
47 speed = "1Gbps";
48 break;
49 case MAC_SPD_2500:
50 speed = "2.5Gbps";
51 break;
52 }
53
54 if (pmsr & MAC_LNK_STS) {
55 dev_info(gsw->dev, "Port %d Link is Up - %s/%s\n",
56 port, speed, (pmsr & MAC_DPX_STS) ? "Full" : "Half");
57 } else {
58 dev_info(gsw->dev, "Port %d Link is Down\n", port);
59 }
60 }
61
62 void mt753x_irq_worker(struct work_struct *work)
63 {
64 struct gsw_mt753x *gsw;
65 u32 sts, physts, laststs;
66 int i;
67
68 gsw = container_of(work, struct gsw_mt753x, irq_worker);
69
70 sts = mt753x_reg_read(gsw, SYS_INT_STS);
71
72 /* Check for changed PHY link status */
73 for (i = 0; i < MT753X_NUM_PHYS; i++) {
74 if (!(sts & PHY_LC_INT(i)))
75 continue;
76
77 laststs = gsw->phy_link_sts & BIT(i);
78 physts = !!(gsw->mii_read(gsw, i, MII_BMSR) & BMSR_LSTATUS);
79 physts <<= i;
80
81 if (physts ^ laststs) {
82 gsw->phy_link_sts ^= BIT(i);
83 display_port_link_status(gsw, i);
84 }
85 }
86
87 mt753x_reg_write(gsw, SYS_INT_STS, sts);
88
89 enable_irq(gsw->irq);
90 }