target/linux/mediatek/patches-4.4/0039-soc-mediatek-PMIC-wrap-add-a-slave-specific-struct.patch

   1 From 7c6b5e5e36ccd9079a2425dc80507447784b9bb2 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 20 Jan 2016 09:55:08 +0100
   4 Subject: [PATCH 39/53] soc: mediatek: PMIC wrap: add a slave specific struct
   5
   6 This patch adds a new struct pwrap_slv_type that we use to store the slave
   7 specific data. The patch adds 2 new helper functions to access the dew
   8 registers. The slave type is looked up via the wrappers child node.
   9
  10 Signed-off-by: John Crispin <blogic@openwrt.org>
  11 ---
  12  drivers/soc/mediatek/mtk-pmic-wrap.c |  159 ++++++++++++++++++++++++----------
  13  1 file changed, 112 insertions(+), 47 deletions(-)
  14
  15 diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
  16 index a2bacda..bcc841e 100644
  17 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
  18 +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
  19 @@ -69,33 +69,54 @@
  20                                           PWRAP_WDT_SRC_EN_HARB_STAUPD_DLE | \
  21                                           PWRAP_WDT_SRC_EN_HARB_STAUPD_ALE)
  22
  23 -/* macro for slave device wrapper registers */
  24 -#define PWRAP_DEW_BASE                 0xbc00
  25 -#define PWRAP_DEW_EVENT_OUT_EN         (PWRAP_DEW_BASE + 0x0)
  26 -#define PWRAP_DEW_DIO_EN               (PWRAP_DEW_BASE + 0x2)
  27 -#define PWRAP_DEW_EVENT_SRC_EN         (PWRAP_DEW_BASE + 0x4)
  28 -#define PWRAP_DEW_EVENT_SRC            (PWRAP_DEW_BASE + 0x6)
  29 -#define PWRAP_DEW_EVENT_FLAG           (PWRAP_DEW_BASE + 0x8)
  30 -#define PWRAP_DEW_READ_TEST            (PWRAP_DEW_BASE + 0xa)
  31 -#define PWRAP_DEW_WRITE_TEST           (PWRAP_DEW_BASE + 0xc)
  32 -#define PWRAP_DEW_CRC_EN               (PWRAP_DEW_BASE + 0xe)
  33 -#define PWRAP_DEW_CRC_VAL              (PWRAP_DEW_BASE + 0x10)
  34 -#define PWRAP_DEW_MON_GRP_SEL          (PWRAP_DEW_BASE + 0x12)
  35 -#define PWRAP_DEW_MON_FLAG_SEL         (PWRAP_DEW_BASE + 0x14)
  36 -#define PWRAP_DEW_EVENT_TEST           (PWRAP_DEW_BASE + 0x16)
  37 -#define PWRAP_DEW_CIPHER_KEY_SEL       (PWRAP_DEW_BASE + 0x18)
  38 -#define PWRAP_DEW_CIPHER_IV_SEL                (PWRAP_DEW_BASE + 0x1a)
  39 -#define PWRAP_DEW_CIPHER_LOAD          (PWRAP_DEW_BASE + 0x1c)
  40 -#define PWRAP_DEW_CIPHER_START         (PWRAP_DEW_BASE + 0x1e)
  41 -#define PWRAP_DEW_CIPHER_RDY           (PWRAP_DEW_BASE + 0x20)
  42 -#define PWRAP_DEW_CIPHER_MODE          (PWRAP_DEW_BASE + 0x22)
  43 -#define PWRAP_DEW_CIPHER_SWRST         (PWRAP_DEW_BASE + 0x24)
  44 -#define PWRAP_MT8173_DEW_CIPHER_IV0    (PWRAP_DEW_BASE + 0x26)
  45 -#define PWRAP_MT8173_DEW_CIPHER_IV1    (PWRAP_DEW_BASE + 0x28)
  46 -#define PWRAP_MT8173_DEW_CIPHER_IV2    (PWRAP_DEW_BASE + 0x2a)
  47 -#define PWRAP_MT8173_DEW_CIPHER_IV3    (PWRAP_DEW_BASE + 0x2c)
  48 -#define PWRAP_MT8173_DEW_CIPHER_IV4    (PWRAP_DEW_BASE + 0x2e)
  49 -#define PWRAP_MT8173_DEW_CIPHER_IV5    (PWRAP_DEW_BASE + 0x30)
  50 +/* defines for slave device wrapper registers */
  51 +enum dew_regs {
  52 +       PWRAP_DEW_BASE,
  53 +       PWRAP_DEW_DIO_EN,
  54 +       PWRAP_DEW_READ_TEST,
  55 +       PWRAP_DEW_WRITE_TEST,
  56 +       PWRAP_DEW_CRC_EN,
  57 +       PWRAP_DEW_CRC_VAL,
  58 +       PWRAP_DEW_MON_GRP_SEL,
  59 +       PWRAP_DEW_CIPHER_KEY_SEL,
  60 +       PWRAP_DEW_CIPHER_IV_SEL,
  61 +       PWRAP_DEW_CIPHER_RDY,
  62 +       PWRAP_DEW_CIPHER_MODE,
  63 +       PWRAP_DEW_CIPHER_SWRST,
  64 +
  65 +       /* MT6397 only regs */
  66 +       PWRAP_DEW_EVENT_OUT_EN,
  67 +       PWRAP_DEW_EVENT_SRC_EN,
  68 +       PWRAP_DEW_EVENT_SRC,
  69 +       PWRAP_DEW_EVENT_FLAG,
  70 +       PWRAP_DEW_MON_FLAG_SEL,
  71 +       PWRAP_DEW_EVENT_TEST,
  72 +       PWRAP_DEW_CIPHER_LOAD,
  73 +       PWRAP_DEW_CIPHER_START,
  74 +};
  75 +
  76 +static const u32 mt6397_regs[] = {
  77 +       [PWRAP_DEW_BASE] =              0xbc00,
  78 +       [PWRAP_DEW_EVENT_OUT_EN] =      0xbc00,
  79 +       [PWRAP_DEW_DIO_EN] =            0xbc02,
  80 +       [PWRAP_DEW_EVENT_SRC_EN] =      0xbc04,
  81 +       [PWRAP_DEW_EVENT_SRC] =         0xbc06,
  82 +       [PWRAP_DEW_EVENT_FLAG] =        0xbc08,
  83 +       [PWRAP_DEW_READ_TEST] =         0xbc0a,
  84 +       [PWRAP_DEW_WRITE_TEST] =        0xbc0c,
  85 +       [PWRAP_DEW_CRC_EN] =            0xbc0e,
  86 +       [PWRAP_DEW_CRC_VAL] =           0xbc10,
  87 +       [PWRAP_DEW_MON_GRP_SEL] =       0xbc12,
  88 +       [PWRAP_DEW_MON_FLAG_SEL] =      0xbc14,
  89 +       [PWRAP_DEW_EVENT_TEST] =        0xbc16,
  90 +       [PWRAP_DEW_CIPHER_KEY_SEL] =    0xbc18,
  91 +       [PWRAP_DEW_CIPHER_IV_SEL] =     0xbc1a,
  92 +       [PWRAP_DEW_CIPHER_LOAD] =       0xbc1c,
  93 +       [PWRAP_DEW_CIPHER_START] =      0xbc1e,
  94 +       [PWRAP_DEW_CIPHER_RDY] =        0xbc20,
  95 +       [PWRAP_DEW_CIPHER_MODE] =       0xbc22,
  96 +       [PWRAP_DEW_CIPHER_SWRST] =      0xbc24,
  97 +};
  98
  99  enum pwrap_regs {
 100         PWRAP_MUX_SEL,
 101 @@ -349,16 +370,26 @@ static int mt8135_regs[] = {
 102         [PWRAP_DCM_DBC_PRD] =           0x160,
 103  };
 104
 105 +enum pmic_type {
 106 +       PMIC_MT6397,
 107 +};
 108 +
 109  enum pwrap_type {
 110         PWRAP_MT8135,
 111         PWRAP_MT8173,
 112  };
 113
 114 +struct pwrap_slv_type {
 115 +       const u32 *dew_regs;
 116 +       enum pmic_type type;
 117 +};
 118 +
 119  struct pmic_wrapper {
 120         struct device *dev;
 121         void __iomem *base;
 122         struct regmap *regmap;
 123         const struct pmic_wrapper_type *master;
 124 +       const struct pwrap_slv_type *slave;
 125         struct clk *clk_spi;
 126         struct clk *clk_wrap;
 127         struct reset_control *rstc;
 128 @@ -544,7 +575,8 @@ static int pwrap_init_sidly(struct pmic_wrapper *wrp)
 129
 130         for (i = 0; i < 4; i++) {
 131                 pwrap_writel(wrp, i, PWRAP_SIDLY);
 132 -               pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
 133 +               pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_READ_TEST],
 134 +                          &rdata);
 135                 if (rdata == PWRAP_DEW_READ_TEST_VAL) {
 136                         dev_dbg(wrp->dev, "[Read Test] pass, SIDLY=%x\n", i);
 137                         pass |= 1 << i;
 138 @@ -593,7 +625,8 @@ static bool pwrap_is_pmic_cipher_ready(struct pmic_wrapper *wrp)
 139         u32 rdata;
 140         int ret;
 141
 142 -       ret = pwrap_read(wrp, PWRAP_DEW_CIPHER_RDY, &rdata);
 143 +       ret = pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_RDY],
 144 +                        &rdata);
 145         if (ret)
 146                 return 0;
 147
 148 @@ -621,12 +654,12 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 149         }
 150
 151         /* Config cipher mode @PMIC */
 152 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x1);
 153 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_SWRST, 0x0);
 154 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_KEY_SEL, 0x1);
 155 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_IV_SEL, 0x2);
 156 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_LOAD, 0x1);
 157 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_START, 0x1);
 158 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x1);
 159 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_SWRST], 0x0);
 160 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_KEY_SEL], 0x1);
 161 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_IV_SEL], 0x2);
 162 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_LOAD], 0x1);
 163 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_START], 0x1);
 164
 165         /* wait for cipher data ready@AP */
 166         ret = pwrap_wait_for_state(wrp, pwrap_is_cipher_ready);
 167 @@ -643,7 +676,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 168         }
 169
 170         /* wait for cipher mode idle */
 171 -       pwrap_write(wrp, PWRAP_DEW_CIPHER_MODE, 0x1);
 172 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CIPHER_MODE], 0x1);
 173         ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
 174         if (ret) {
 175                 dev_err(wrp->dev, "cipher mode idle fail, ret=%d\n", ret);
 176 @@ -653,9 +686,11 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
 177         pwrap_writel(wrp, 1, PWRAP_CIPHER_MODE);
 178
 179         /* Write Test */
 180 -       if (pwrap_write(wrp, PWRAP_DEW_WRITE_TEST, PWRAP_DEW_WRITE_TEST_VAL) ||
 181 -           pwrap_read(wrp, PWRAP_DEW_WRITE_TEST, &rdata) ||
 182 -                       (rdata != PWRAP_DEW_WRITE_TEST_VAL)) {
 183 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_WRITE_TEST],
 184 +                       PWRAP_DEW_WRITE_TEST_VAL) ||
 185 +           pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_WRITE_TEST],
 186 +                      &rdata) ||
 187 +           (rdata != PWRAP_DEW_WRITE_TEST_VAL)) {
 188                 dev_err(wrp->dev, "rdata=0x%04X\n", rdata);
 189                 return -EFAULT;
 190         }
 191 @@ -677,8 +712,10 @@ static int pwrap_mt8135_init_soc_specific(struct pmic_wrapper *wrp)
 192         writel(0x7ff, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INT_EN);
 193
 194         /* enable PMIC event out and sources */
 195 -       if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
 196 -               pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
 197 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_OUT_EN],
 198 +                       0x1) ||
 199 +           pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_SRC_EN],
 200 +                       0xffff)) {
 201                 dev_err(wrp->dev, "enable dewrap fail\n");
 202                 return -EFAULT;
 203         }
 204 @@ -689,8 +726,10 @@ static int pwrap_mt8135_init_soc_specific(struct pmic_wrapper *wrp)
 205  static int pwrap_mt8173_init_soc_specific(struct pmic_wrapper *wrp)
 206  {
 207         /* PMIC_DEWRAP enables */
 208 -       if (pwrap_write(wrp, PWRAP_DEW_EVENT_OUT_EN, 0x1) ||
 209 -               pwrap_write(wrp, PWRAP_DEW_EVENT_SRC_EN, 0xffff)) {
 210 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_OUT_EN],
 211 +                       0x1) ||
 212 +           pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_EVENT_SRC_EN],
 213 +                       0xffff)) {
 214                 dev_err(wrp->dev, "enable dewrap fail\n");
 215                 return -EFAULT;
 216         }
 217 @@ -734,7 +773,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 218                 return ret;
 219
 220         /* Enable dual IO mode */
 221 -       pwrap_write(wrp, PWRAP_DEW_DIO_EN, 1);
 222 +       pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_DIO_EN], 1);
 223
 224         /* Check IDLE & INIT_DONE in advance */
 225         ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle_and_sync_idle);
 226 @@ -746,7 +785,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 227         pwrap_writel(wrp, 1, PWRAP_DIO_EN);
 228
 229         /* Read Test */
 230 -       pwrap_read(wrp, PWRAP_DEW_READ_TEST, &rdata);
 231 +       pwrap_read(wrp, wrp->slave->dew_regs[PWRAP_DEW_READ_TEST], &rdata);
 232         if (rdata != PWRAP_DEW_READ_TEST_VAL) {
 233                 dev_err(wrp->dev, "Read test failed after switch to DIO mode: 0x%04x != 0x%04x\n",
 234                                 PWRAP_DEW_READ_TEST_VAL, rdata);
 235 @@ -759,12 +798,13 @@ static int pwrap_init(struct pmic_wrapper *wrp)
 236                 return ret;
 237
 238         /* Signature checking - using CRC */
 239 -       if (pwrap_write(wrp, PWRAP_DEW_CRC_EN, 0x1))
 240 +       if (pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_EN], 0x1))
 241                 return -EFAULT;
 242
 243         pwrap_writel(wrp, 0x1, PWRAP_CRC_EN);
 244         pwrap_writel(wrp, 0x0, PWRAP_SIG_MODE);
 245 -       pwrap_writel(wrp, PWRAP_DEW_CRC_VAL, PWRAP_SIG_ADR);
 246 +       pwrap_writel(wrp, wrp->slave->dew_regs[PWRAP_DEW_CRC_VAL],
 247 +                    PWRAP_SIG_ADR);
 248         pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
 249
 250         if (wrp->master->type == PWRAP_MT8135)
 251 @@ -818,6 +858,21 @@ static const struct regmap_config pwrap_regmap_config = {
 252         .max_register = 0xffff,
 253  };
 254
 255 +static const struct pwrap_slv_type pmic_mt6397 = {
 256 +       .dew_regs = mt6397_regs,
 257 +       .type = PMIC_MT6397,
 258 +};
 259 +
 260 +static const struct of_device_id of_slave_match_tbl[] = {
 261 +       {
 262 +               .compatible = "mediatek,mt6397",
 263 +               .data = &pmic_mt6397,
 264 +       }, {
 265 +               /* sentinel */
 266 +       }
 267 +};
 268 +MODULE_DEVICE_TABLE(of, of_slave_match_tbl);
 269 +
 270  static struct pmic_wrapper_type pwrap_mt8135 = {
 271         .regs = mt8135_regs,
 272         .type = PWRAP_MT8135,
 273 @@ -862,8 +917,17 @@ static int pwrap_probe(struct platform_device *pdev)
 274         struct device_node *np = pdev->dev.of_node;
 275         const struct of_device_id *of_id =
 276                 of_match_device(of_pwrap_match_tbl, &pdev->dev);
 277 +       const struct of_device_id *of_slave_id = NULL;
 278         struct resource *res;
 279
 280 +       if (pdev->dev.of_node->child)
 281 +               of_slave_id = of_match_node(of_slave_match_tbl,
 282 +                                           pdev->dev.of_node->child);
 283 +       if (!of_slave_id) {
 284 +               dev_dbg(&pdev->dev, "slave pmic should be defined in dts\n");
 285 +               return -EINVAL;
 286 +       }
 287 +
 288         wrp = devm_kzalloc(&pdev->dev, sizeof(*wrp), GFP_KERNEL);
 289         if (!wrp)
 290                 return -ENOMEM;
 291 @@ -871,6 +935,7 @@ static int pwrap_probe(struct platform_device *pdev)
 292         platform_set_drvdata(pdev, wrp);
 293
 294         wrp->master = of_id->data;
 295 +       wrp->slave = of_slave_id->data;
 296         wrp->dev = &pdev->dev;
 297
 298         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwrap");
 299 --
 300 1.7.10.4
 301