mediatek: don't break auxadc without 32k clk
[openwrt/openwrt.git] / target / linux / mediatek / patches-5.15 / 501-auxadc-add-auxadc-32k-clk.patch
1 --- a/drivers/iio/adc/mt6577_auxadc.c
2 +++ b/drivers/iio/adc/mt6577_auxadc.c
3 @@ -42,6 +42,7 @@ struct mtk_auxadc_compatible {
4 struct mt6577_auxadc_device {
5 void __iomem *reg_base;
6 struct clk *adc_clk;
7 + struct clk *adc_32k_clk;
8 struct mutex lock;
9 const struct mtk_auxadc_compatible *dev_comp;
10 };
11 @@ -222,6 +223,14 @@ static int __maybe_unused mt6577_auxadc_
12 return ret;
13 }
14
15 + if (!IS_ERR(adc_dev->adc_32k_clk)) {
16 + ret = clk_prepare_enable(adc_dev->adc_32k_clk);
17 + if (ret) {
18 + pr_err("failed to enable auxadc clock\n");
19 + return ret;
20 + }
21 + }
22 +
23 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
24 MT6577_AUXADC_PDN_EN, 0);
25 mdelay(MT6577_AUXADC_POWER_READY_MS);
26 @@ -236,6 +243,8 @@ static int __maybe_unused mt6577_auxadc_
27
28 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
29 0, MT6577_AUXADC_PDN_EN);
30 +
31 + clk_disable_unprepare(adc_dev->adc_32k_clk);
32 clk_disable_unprepare(adc_dev->adc_clk);
33
34 return 0;
35 @@ -277,6 +286,17 @@ static int mt6577_auxadc_probe(struct pl
36 return ret;
37 }
38
39 + adc_dev->adc_32k_clk = devm_clk_get(&pdev->dev, "32k");
40 + if (IS_ERR(adc_dev->adc_32k_clk)) {
41 + dev_err(&pdev->dev, "failed to get auxadc 32k clock\n");
42 + } else {
43 + ret = clk_prepare_enable(adc_dev->adc_32k_clk);
44 + if (ret) {
45 + dev_err(&pdev->dev, "failed to enable auxadc 32k clock\n");
46 + return ret;
47 + }
48 + }
49 +
50 adc_clk_rate = clk_get_rate(adc_dev->adc_clk);
51 if (!adc_clk_rate) {
52 ret = -EINVAL;
53 @@ -306,6 +326,7 @@ err_power_off:
54 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
55 0, MT6577_AUXADC_PDN_EN);
56 err_disable_clk:
57 + clk_disable_unprepare(adc_dev->adc_32k_clk);
58 clk_disable_unprepare(adc_dev->adc_clk);
59 return ret;
60 }
61 @@ -320,6 +341,7 @@ static int mt6577_auxadc_remove(struct p
62 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
63 0, MT6577_AUXADC_PDN_EN);
64
65 + clk_disable_unprepare(adc_dev->adc_32k_clk);
66 clk_disable_unprepare(adc_dev->adc_clk);
67
68 return 0;