target/linux/mediatek/patches-5.4/0602-net-dsa-mt7530-use-resolved-link-config-in-mac_link_.patch

   1 From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
   2 Date: Fri, 27 Mar 2020 15:44:12 +0100
   3 Subject: [PATCH] net: dsa: mt7530: use resolved link config in mac_link_up()
   4 MIME-Version: 1.0
   5 Content-Type: text/plain; charset=UTF-8
   6 Content-Transfer-Encoding: 8bit
   7
   8 Convert the mt7530 switch driver to use the finalised link
   9 parameters in mac_link_up() rather than the parameters in mac_config().
  10
  11 Signed-off-by: René van Dorst <opensource@vdorst.com>
  12 Tested-by: Sean Wang <sean.wang@mediatek.com>
  13 Signed-off-by: David S. Miller <davem@davemloft.net>
  14 ---
  15
  16 --- a/drivers/net/dsa/mt7530.c
  17 +++ b/drivers/net/dsa/mt7530.c
  18 @@ -488,17 +488,6 @@ mt7530_mib_reset(struct dsa_switch *ds)
  19         mt7530_write(priv, MT7530_MIB_CCR, CCR_MIB_ACTIVATE);
  20  }
  21
  22 -static void
  23 -mt7530_port_set_status(struct mt7530_priv *priv, int port, int enable)
  24 -{
  25 -       u32 mask = PMCR_TX_EN | PMCR_RX_EN | PMCR_FORCE_LNK;
  26 -
  27 -       if (enable)
  28 -               mt7530_set(priv, MT7530_PMCR_P(port), mask);
  29 -       else
  30 -               mt7530_clear(priv, MT7530_PMCR_P(port), mask);
  31 -}
  32 -
  33  static int mt7530_phy_read(struct dsa_switch *ds, int port, int regnum)
  34  {
  35         struct mt7530_priv *priv = ds->priv;
  36 @@ -672,7 +661,7 @@ mt7530_port_enable(struct dsa_switch *ds
  37         priv->ports[port].enable = true;
  38         mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
  39                    priv->ports[port].pm);
  40 -       mt7530_port_set_status(priv, port, 0);
  41 +       mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK);
  42
  43         mutex_unlock(&priv->reg_mutex);
  44
  45 @@ -695,7 +684,7 @@ mt7530_port_disable(struct dsa_switch *d
  46         priv->ports[port].enable = false;
  47         mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
  48                    PCR_MATRIX_CLR);
  49 -       mt7530_port_set_status(priv, port, 0);
  50 +       mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK);
  51
  52         mutex_unlock(&priv->reg_mutex);
  53  }
  54 @@ -1405,8 +1394,7 @@ static void mt7530_phylink_mac_config(st
  55
  56         mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port));
  57         mcr_new = mcr_cur;
  58 -       mcr_new &= ~(PMCR_FORCE_SPEED_1000 | PMCR_FORCE_SPEED_100 |
  59 -                    PMCR_FORCE_FDX | PMCR_TX_FC_EN | PMCR_RX_FC_EN);
  60 +       mcr_new &= ~PMCR_LINK_SETTINGS_MASK;
  61         mcr_new |= PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | PMCR_BACKOFF_EN |
  62                    PMCR_BACKPR_EN | PMCR_FORCE_MODE;
  63
  64 @@ -1414,26 +1402,6 @@ static void mt7530_phylink_mac_config(st
  65         if (port == 5 && dsa_is_user_port(ds, 5))
  66                 mcr_new |= PMCR_EXT_PHY;
  67
  68 -       switch (state->speed) {
  69 -       case SPEED_1000:
  70 -               mcr_new |= PMCR_FORCE_SPEED_1000;
  71 -               if (priv->eee_enable & BIT(port))
  72 -                       mcr_new |= PMCR_FORCE_EEE1G;
  73 -               break;
  74 -       case SPEED_100:
  75 -               mcr_new |= PMCR_FORCE_SPEED_100;
  76 -               if (priv->eee_enable & BIT(port))
  77 -                       mcr_new |= PMCR_FORCE_EEE100;
  78 -               break;
  79 -       }
  80 -       if (state->duplex == DUPLEX_FULL) {
  81 -               mcr_new |= PMCR_FORCE_FDX;
  82 -               if (state->pause & MLO_PAUSE_TX)
  83 -                       mcr_new |= PMCR_TX_FC_EN;
  84 -               if (state->pause & MLO_PAUSE_RX)
  85 -                       mcr_new |= PMCR_RX_FC_EN;
  86 -       }
  87 -
  88         if (mcr_new != mcr_cur)
  89                 mt7530_write(priv, MT7530_PMCR_P(port), mcr_new);
  90  }
  91 @@ -1444,7 +1412,7 @@ static void mt7530_phylink_mac_link_down
  92  {
  93         struct mt7530_priv *priv = ds->priv;
  94
  95 -       mt7530_port_set_status(priv, port, 0);
  96 +       mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK);
  97  }
  98
  99  static void mt7530_phylink_mac_link_up(struct dsa_switch *ds, int port,
 100 @@ -1455,8 +1423,31 @@ static void mt7530_phylink_mac_link_up(s
 101                                        bool tx_pause, bool rx_pause)
 102  {
 103         struct mt7530_priv *priv = ds->priv;
 104 +       u32 mcr;
 105 +
 106 +       mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK;
 107 +
 108 +       switch (speed) {
 109 +       case SPEED_1000:
 110 +               mcr |= PMCR_FORCE_SPEED_1000;
 111 +               if (priv->eee_enable & BIT(port))
 112 +                       mcr_new |= PMCR_FORCE_EEE1G;
 113 +               break;
 114 +       case SPEED_100:
 115 +               mcr |= PMCR_FORCE_SPEED_100;
 116 +               if (priv->eee_enable & BIT(port))
 117 +                       mcr_new |= PMCR_FORCE_EEE100;
 118 +               break;
 119 +       }
 120 +       if (duplex == DUPLEX_FULL) {
 121 +               mcr |= PMCR_FORCE_FDX;
 122 +               if (tx_pause)
 123 +                       mcr |= PMCR_TX_FC_EN;
 124 +               if (rx_pause)
 125 +                       mcr |= PMCR_RX_FC_EN;
 126 +       }
 127
 128 -       mt7530_port_set_status(priv, port, 1);
 129 +       mt7530_set(priv, MT7530_PMCR_P(port), mcr);
 130  }
 131
 132  static void mt7530_phylink_validate(struct dsa_switch *ds, int port,
 133 --- a/drivers/net/dsa/mt7530.h
 134 +++ b/drivers/net/dsa/mt7530.h
 135 @@ -222,6 +222,10 @@ enum mt7530_vlan_port_attr {
 136  #define  PMCR_FORCE_LNK                        BIT(0)
 137  #define  PMCR_SPEED_MASK               (PMCR_FORCE_SPEED_100 | \
 138                                          PMCR_FORCE_SPEED_1000)
 139 +#define  PMCR_LINK_SETTINGS_MASK       (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \
 140 +                                        PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \
 141 +                                        PMCR_TX_FC_EN | PMCR_RX_FC_EN | \
 142 +                                        PMCR_FORCE_FDX | PMCR_FORCE_LNK)
 143
 144  #define MT7530_PMSR_P(x)               (0x3008 + (x) * 0x100)
 145  #define  PMSR_EEE1G                    BIT(7)