target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts

   1 /*
   2  * Aerohive HiveAP-330 Device Tree Source
   3  *
   4  * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /include/ "fsl/p1020si-pre.dtsi"
  13 / {
  14         model = "Aerohive HiveAP-330";
  15         compatible = "aerohive,hiveap-330";
  16
  17         chosen {
  18                 bootargs-override = "console=ttyS0,9600";
  19         };
  20
  21         memory {
  22                 device_type = "memory";
  23         };
  24
  25         board_lbc: lbc: localbus@ffe05000 {
  26                 reg = <0 0xffe05000 0 0x1000>;
  27                 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
  28
  29                 nor@0,0 {
  30                         #address-cells = <1>;
  31                         #size-cells = <1>;
  32                         compatible = "cfi-flash";
  33                         reg = <0x0 0x0 0x4000000>;
  34                         bank-width = <2>;
  35                         device-width = <1>;
  36
  37                         partition@0 {
  38                                 reg = <0x0 0x40000>;
  39                                 label = "dtb";
  40                         };
  41
  42                         partition@40000 {
  43                                 reg = <0x40000 0x40000>;
  44                                 label = "initrd";
  45                         };
  46
  47                         partition@80000 {
  48                                 reg = <0x80000 0x27c0000>;
  49                                 label = "rootfs";
  50                         };
  51
  52                         partition@2840000 {
  53                                 reg = <0x2840000 0x800000>;
  54                                 label = "kernel";
  55                         };
  56
  57                         partition@3040000 {
  58                                 reg = <0x3040000 0xec0000>;
  59                                 label = "stock-jffs2";
  60                                 read-only;
  61                         };
  62
  63                         hwinfo: partition@3f00000 {
  64                                 reg = <0x3f00000 0x20000>;
  65                                 label = "hw-info";
  66                                 read-only;
  67                         };
  68
  69                         partition@3f20000 {
  70                                 reg = <0x3f20000 0x20000>;
  71                                 label = "boot-info";
  72                                 read-only;
  73                         };
  74
  75                         partition@3f40000 {
  76                                 reg = <0x3f40000 0x20000>;
  77                                 label = "boot-info-backup";
  78                                 read-only;
  79                         };
  80
  81                         partition@3f60000 {
  82                                 reg = <0x3f60000 0x20000>;
  83                                 label = "u-boot-env";
  84                         };
  85
  86                         partition@3f80000 {
  87                                 reg = <0x3f80000 0x80000>;
  88                                 label = "u-boot";
  89                                 read-only;
  90                         };
  91
  92                         firmware@0 {
  93                                 reg = <0x0 0x3040000>;
  94                                 label = "firmware";
  95                         };
  96                 };
  97         };
  98
  99         board_soc: soc: soc@ffe00000 {
 100                 ranges = <0x0 0x0 0xffe00000 0x100000>;
 101
 102                 i2c@3100 {
 103                         tpm@29 {
 104                                 compatible = "atmel,at97sc3204t";
 105                                 reg = <0x29>;
 106                         };
 107
 108                         lp5521@32 {
 109                                 compatible = "national,lp5521";
 110                                 reg = <0x32>;
 111                                 clock-mode = /bits/ 8 <2>;
 112                                 chan0 {
 113                                         chan-name = "hiveap-330:red:tricolor0";
 114                                         led-cur = /bits/ 8 <0x2f>;
 115                                         max-cur = /bits/ 8 <0x5f>;
 116                                 };
 117                                 chan1 {
 118                                         chan-name = "hiveap-330:green:tricolor0";
 119                                         led-cur = /bits/ 8 <0x2f>;
 120                                         max-cur = /bits/ 8 <0x5f>;
 121                                 };
 122                                 chan2 {
 123                                         chan-name = "hiveap-330:blue:tricolor0";
 124                                         led-cur = /bits/ 8 <0x2f>;
 125                                         max-cur = /bits/ 8 <0x5f>;
 126                                 };
 127                         };
 128
 129                         /* Most likely SoC boot config */
 130                         eeprom@51 {
 131                                 compatible = "eeprom";
 132                                 reg = <0x51>;
 133                         };
 134                 };
 135
 136                 mdio@24000 {
 137                         phy0: ethernet-phy@0 {
 138                                 interrupts = <3 1 0 0>;
 139                                 reg = <0x1>;
 140                         };
 141
 142                         phy1: ethernet-phy@1 {
 143                                 interrupts = <2 1 0 0>;
 144                                 reg = <0x2>;
 145                         };
 146                 };
 147
 148                 mdio@25000 {
 149                         status = "disabled";
 150                 };
 151
 152                 mdio@26000 {
 153                         status = "disabled";
 154                 };
 155
 156                 enet0: ethernet@b0000 {
 157                         status = "okay";
 158                         phy-handle = <&phy0>;
 159                         phy-connection-type = "rgmii-id";
 160                         mtd-mac-address = <&hwinfo 0>;
 161                 };
 162
 163                 enet1: ethernet@b1000 {
 164                         status = "disabled";
 165                 };
 166
 167                 enet2: ethernet@b2000 {
 168                         status = "okay";
 169                         phy-handle = <&phy1>;
 170                         phy-connection-type = "rgmii-id";
 171                         mtd-mac-address = <&hwinfo 0>;
 172                         mtd-mac-address-increment = <1>;
 173                 };
 174
 175                 gpio0: gpio-controller@fc00 {
 176                 };
 177
 178                 usb@22000 {
 179                         phy_type = "ulpi";
 180                         dr_mode = "host";
 181                 };
 182
 183                 usb@23000 {
 184                         status = "disabled";
 185                 };
 186         };
 187
 188         pci0: pcie@ffe09000 {
 189                 reg = <0x0 0xffe09000 0x0 0x1000>;
 190                 ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
 191                         0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
 192                 pcie@0 {
 193                         ranges = <0x2000000 0x0 0xa0000000
 194                                   0x2000000 0x0 0xa0000000
 195                                   0x0 0x20000000
 196
 197                                   0x1000000 0x0 0x0
 198                                   0x1000000 0x0 0x0
 199                                   0x0 0x100000>;
 200                 };
 201         };
 202
 203         pci1: pcie@ffe0a000 {
 204                 reg = <0x0 0xffe0a000 0x0 0x1000>;
 205                 ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
 206                       0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
 207                 pcie@0 {
 208                         ranges = <0x2000000 0x0 0xc0000000
 209                               0x2000000 0x0 0xc0000000
 210                                   0x0 0x20000000
 211
 212                                   0x1000000 0x0 0x0
 213                                   0x1000000 0x0 0x0
 214                                   0x0 0x100000>;
 215                 };
 216         };
 217
 218         buttons {
 219                 compatible = "gpio-keys";
 220
 221                 reset {
 222                         label = "Reset button";
 223                         gpios = <&gpio0 8 1>; /* active low */
 224                         linux,code = <0x198>; /* KEY_RESTART */
 225                 };
 226         };
 227 };
 228 /include/ "fsl/p1020si-post.dtsi"