target/linux/mpc85xx/files/arch/powerpc/boot/dts/hiveap-330.dts

   1 /*
   2  * Aerohive HiveAP-330 Device Tree Source
   3  *
   4  * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /include/ "fsl/p1020si-pre.dtsi"
  13 / {
  14         model = "Aerohive HiveAP-330";
  15         compatible = "aerohive,hiveap-330";
  16
  17         chosen {
  18                 bootargs = "console=ttyS0,9600";
  19                 bootargs-override = "console=ttyS0,9600 noinitrd";
  20         };
  21
  22         memory {
  23                 device_type = "memory";
  24         };
  25
  26         board_lbc: lbc: localbus@ffe05000 {
  27                 reg = <0 0xffe05000 0 0x1000>;
  28                 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
  29
  30                 nor@0,0 {
  31                         #address-cells = <1>;
  32                         #size-cells = <1>;
  33                         compatible = "cfi-flash";
  34                         reg = <0x0 0x0 0x4000000>;
  35                         bank-width = <2>;
  36                         device-width = <1>;
  37
  38                         partition@0 {
  39                                 reg = <0x0 0x40000>;
  40                                 label = "dtb";
  41                         };
  42
  43                         partition@40000 {
  44                                 reg = <0x40000 0x40000>;
  45                                 label = "initramfs";
  46                         };
  47
  48                         partition@80000 {
  49                                 reg = <0x80000 0x27c0000>;
  50                                 label = "rootfs";
  51                         };
  52
  53                         partition@2840000 {
  54                                 reg = <0x2840000 0x800000>;
  55                                 label = "kernel";
  56                         };
  57
  58                         partition@3040000 {
  59                                 reg = <0x3040000 0xec0000>;
  60                                 label = "stock-jffs2";
  61                                 read-only;
  62                         };
  63
  64                         partition@3f00000 {
  65                                 reg = <0x3f00000 0x20000>;
  66                                 label = "hw-info";
  67                                 read-only;
  68                         };
  69
  70                         partition@3f20000 {
  71                                 reg = <0x3f20000 0x20000>;
  72                                 label = "boot-info";
  73                                 read-only;
  74                         };
  75
  76                         partition@3f40000 {
  77                                 reg = <0x3f40000 0x20000>;
  78                                 label = "boot-info-backup";
  79                                 read-only;
  80                         };
  81
  82                         partition@3f60000 {
  83                                 reg = <0x3f60000 0x20000>;
  84                                 label = "u-boot-env";
  85                         };
  86
  87                         partition@3f80000 {
  88                                 reg = <0x3f80000 0x80000>;
  89                                 label = "u-boot";
  90                                 read-only;
  91                         };
  92
  93                         firmware@0 {
  94                                 reg = <0x0 0x3040000>;
  95                                 label = "firmware";
  96                         };
  97                 };
  98         };
  99
 100         board_soc: soc: soc@ffe00000 {
 101                 ranges = <0x0 0x0 0xffe00000 0x100000>;
 102
 103                 i2c@3100 {
 104                         tpm@29 {
 105                                 compatible = "atmel,at97sc3204t";
 106                                 reg = <0x29>;
 107                         };
 108
 109                         lp5521@32 {
 110                                 compatible = "national,lp5521";
 111                                 reg = <0x32>;
 112                                 clock-mode = /bits/ 8 <2>;
 113                                 chan0 {
 114                                         chan-name = "hiveap-330:red:tricolor0";
 115                                         led-cur = /bits/ 8 <0x2f>;
 116                                         max-cur = /bits/ 8 <0x5f>;
 117                                 };
 118                                 chan1 {
 119                                         chan-name = "hiveap-330:green:tricolor0";
 120                                         led-cur = /bits/ 8 <0x2f>;
 121                                         max-cur = /bits/ 8 <0x5f>;
 122                                 };
 123                                 chan2 {
 124                                         chan-name = "hiveap-330:blue:tricolor0";
 125                                         led-cur = /bits/ 8 <0x2f>;
 126                                         max-cur = /bits/ 8 <0x5f>;
 127                                 };
 128                         };
 129
 130                         /* Most likely SoC boot config */
 131                         eeprom@51 {
 132                                 compatible = "eeprom";
 133                                 reg = <0x51>;
 134                         };
 135                 };
 136
 137                 mdio@24000 {
 138                         phy0: ethernet-phy@0 {
 139                                 interrupts = <3 1 0 0>;
 140                                 reg = <0x1>;
 141                         };
 142
 143                         phy1: ethernet-phy@1 {
 144                                 interrupts = <2 1 0 0>;
 145                                 reg = <0x2>;
 146                         };
 147                 };
 148
 149                 mdio@25000 {
 150                         status = "disabled";
 151                 };
 152
 153                 mdio@26000 {
 154                         status = "disabled";
 155                 };
 156
 157                 enet0: ethernet@b0000 {
 158                         status = "okay";
 159                         phy-handle = <&phy0>;
 160                         phy-connection-type = "rgmii-id";
 161
 162                 };
 163
 164                 enet1: ethernet@b1000 {
 165                         status = "disabled";
 166                 };
 167
 168                 enet2: ethernet@b2000 {
 169                         status = "okay";
 170                         phy-handle = <&phy1>;
 171                         phy-connection-type = "rgmii-id";
 172                 };
 173
 174                 gpio0: gpio-controller@fc00 {
 175                 };
 176
 177                 usb@22000 {
 178                         phy_type = "ulpi";
 179                         dr_mode = "host";
 180                 };
 181
 182                 usb@23000 {
 183                         status = "disabled";
 184                 };
 185         };
 186
 187         pci0: pcie@ffe09000 {
 188                 reg = <0x0 0xffe09000 0x0 0x1000>;
 189                 ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
 190                         0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
 191                 pcie@0 {
 192                         ranges = <0x2000000 0x0 0xa0000000
 193                                   0x2000000 0x0 0xa0000000
 194                                   0x0 0x20000000
 195
 196                                   0x1000000 0x0 0x0
 197                                   0x1000000 0x0 0x0
 198                                   0x0 0x100000>;
 199                 };
 200         };
 201
 202         pci1: pcie@ffe0a000 {
 203                 reg = <0x0 0xffe0a000 0x0 0x1000>;
 204                 ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
 205                       0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
 206                 pcie@0 {
 207                         ranges = <0x2000000 0x0 0xc0000000
 208                               0x2000000 0x0 0xc0000000
 209                                   0x0 0x20000000
 210
 211                                   0x1000000 0x0 0x0
 212                                   0x1000000 0x0 0x0
 213                                   0x0 0x100000>;
 214                 };
 215         };
 216
 217         buttons {
 218                 compatible = "gpio-keys";
 219
 220                 reset {
 221                         label = "Reset button";
 222                         gpios = <&gpio0 8 1>; /* active low */
 223                         linux,code = <0x198>; /* KEY_RESTART */
 224                 };
 225         };
 226 };
 227 /include/ "fsl/p1020si-post.dtsi"