target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3710i.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later or MIT
   2
   3 /include/ "fsl/p1020si-pre.dtsi"
   4 / {
   5         model = "Enterasys WS-AP3710i";
   6         compatible = "enterasys,ws-ap3710i";
   7
   8         aliases {
   9                 led-boot = &led_power_green;
  10                 led-failsafe = &led_power_red;
  11                 led-running = &led_power_green;
  12                 led-upgrade = &led_power_red;
  13                 label-mac-device = &enet0;
  14         };
  15
  16         memory {
  17                 device_type = "memory";
  18         };
  19
  20         leds {
  21                 compatible = "gpio-leds";
  22
  23                 wifi1 {
  24                         gpios = <&gpio0 3 0>;
  25                         label = "ws-ap3710i:green:radio1";
  26                         linux,default-trigger = "phy0tpt";
  27                 };
  28
  29                 wifi2 {
  30                         gpios = <&gpio0 4 0>;
  31                         label = "ws-ap3710i:green:radio2";
  32                         linux,default-trigger = "phy1tpt";
  33                 };
  34
  35                 led_power_green: power_green {
  36                         gpios = <&gpio0 8 0>;
  37                         label = "ws-ap3710i:green:power";
  38                 };
  39
  40                 led_power_red: power_red {
  41                         gpios = <&gpio0 9 0>;
  42                         label = "ws-ap3710i:red:power";
  43                 };
  44         };
  45
  46         keys {
  47                 compatible = "gpio-keys";
  48
  49                 reset {
  50                         label = "Reset button";
  51                         gpios = <&gpio0 1 1>; /* active low */
  52                         linux,code = <0x198>; /* KEY_RESTART */
  53                 };
  54         };
  55
  56         lbc: localbus@ffe05000 {
  57                 reg = <0 0xffe05000 0 0x1000>;
  58                 ranges = <0x0 0x0 0x0 0xee000000 0x2000000>;
  59
  60                 nor@0,0 {
  61                         #address-cells = <1>;
  62                         #size-cells = <1>;
  63                         compatible = "cfi-flash";
  64                         reg = <0x0 0x0 0x2000000>;
  65                         bank-width = <2>;
  66                         device-width = <1>;
  67
  68                         partitions {
  69                                 compatible = "fixed-partitions";
  70                                 #address-cells = <1>;
  71                                 #size-cells = <1>;
  72
  73                                 partition@0 {
  74                                         compatible = "denx,fit";
  75                                         reg = <0x0 0x1d80000>;
  76                                         label = "firmware";
  77                                 };
  78
  79                                 partition@1d80000 {
  80                                         reg = <0x1d80000 0x80000>;
  81                                         label = "u-boot";
  82                                         read-only;
  83                                 };
  84
  85                                 partition@1e00000 {
  86                                         reg = <0x1e00000 0x100000>;
  87                                         label = "nvram";
  88                                         read-only;
  89                                 };
  90
  91                                 partition@1f00000 {
  92                                         reg = <0x1f00000 0x20000>;
  93                                         label = "cfg2";
  94                                         read-only;
  95                                 };
  96
  97                                 partition@1f20000 {
  98                                         reg = <0x1f20000 0x20000>;
  99                                         label = "cfg1";
 100                                         read-only;
 101                                 };
 102                         };
 103                 };
 104         };
 105
 106         soc: soc@ffe00000 {
 107                 ranges = <0x0 0x0 0xffe00000 0x100000>;
 108
 109                 gpio0: gpio-controller@fc00 {
 110                 };
 111
 112                 mdio@24000 {
 113                         phy4: ethernet-phy@4 {
 114                                 reg = <0x4>;
 115                                 reset-gpios = <&gpio0 2 1>;
 116                         };
 117                 };
 118
 119                 enet0: ethernet@b0000 {
 120                         phy-connection-type = "rgmii-id";
 121                         phy-handle = <&phy4>;
 122                 };
 123
 124                 enet1: ethernet@b1000 {
 125                         status = "disabled";
 126                 };
 127
 128                 enet2: ethernet@b2000 {
 129                         status = "disabled";
 130                 };
 131
 132                 usb@22000 {
 133                         status = "disabled";
 134                 };
 135
 136                 usb@23000 {
 137                         status = "disabled";
 138                 };
 139         };
 140
 141         pci0: pcie@ffe09000 {
 142                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 143                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 144                 reg = <0 0xffe09000 0 0x1000>;
 145                 pcie@0 {
 146                         ranges = <0x2000000 0x0 0xa0000000
 147                                   0x2000000 0x0 0xa0000000
 148                                   0x0 0x20000000
 149
 150                                   0x1000000 0x0 0x0
 151                                   0x1000000 0x0 0x0
 152                                   0x0 0x100000>;
 153                 };
 154         };
 155
 156         pci1: pcie@ffe0a000 {
 157                 reg = <0 0xffe0a000 0 0x1000>;
 158                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 159                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 160                 pcie@0 {
 161                         ranges = <0x2000000 0x0 0x80000000
 162                                   0x2000000 0x0 0x80000000
 163                                   0x0 0x20000000
 164
 165                                   0x1000000 0x0 0x0
 166                                   0x1000000 0x0 0x0
 167                                   0x0 0x100000>;
 168                 };
 169         };
 170
 171 };
 172 /include/ "fsl/p1020si-post.dtsi"