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base-files: define yes/no as valid boolean options
[openwrt/openwrt.git] / target / linux / mvebu / patches-3.10 / 0064-ARM-kirkwood-Relocate-PCIe-device-tree-nodes.patch
1 From ae23894bcb163d1f91483b9566dc077f1e863af6 Mon Sep 17 00:00:00 2001
2 From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
3 Date: Tue, 23 Jul 2013 08:44:00 -0300
4 Subject: [PATCH 064/203] ARM: kirkwood: Relocate PCIe device tree nodes
5
6 Now that mbus has been added to the device tree, it's possible to
7 move the PCIe nodes out of the ocp node, placing it directly
8 below the mbus. This is a more accurate representation of the hardware.
9
10 Moving the PCIe nodes, we now need to introduce an extra cell to
11 encode the window target ID and attribute. Since this depends on
12 the PCIe port, we split the ranges translation entries, to
13 correspond to each MBus window.
14
15 In addition, we encode the PCIe memory and I/O apertures in the MBus
16 node, according to the MBus DT binding specification. The choice made
17 is 0xe0000000-0xf0000000 for memory space, and 0xf200000-0xf2100000 for
18 I/O space. These apertures can be changed in each per-board DT file.
19
20 Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
21 Tested-by: Andrew Lunn <andrew@lunn.ch>
22 Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
23 ---
24 arch/arm/boot/dts/kirkwood-6281.dtsi | 35 ++++++++++++++
25 arch/arm/boot/dts/kirkwood-6282.dtsi | 55 ++++++++++++++++++++++
26 arch/arm/boot/dts/kirkwood-iconnect.dts | 11 +++++
27 arch/arm/boot/dts/kirkwood-mplcec4.dts | 11 +++++
28 .../boot/dts/kirkwood-netgear_readynas_duo_v2.dts | 11 +++++
29 arch/arm/boot/dts/kirkwood-nsa310.dts | 19 ++++----
30 arch/arm/boot/dts/kirkwood-ts219-6282.dts | 19 ++++----
31 arch/arm/boot/dts/kirkwood-ts219.dtsi | 10 ++++
32 arch/arm/boot/dts/kirkwood.dtsi | 4 ++
33 9 files changed, 159 insertions(+), 16 deletions(-)
34
35 --- a/arch/arm/boot/dts/kirkwood-6281.dtsi
36 +++ b/arch/arm/boot/dts/kirkwood-6281.dtsi
37 @@ -1,4 +1,39 @@
38 / {
39 + mbus {
40 + pcie-controller {
41 + compatible = "marvell,kirkwood-pcie";
42 + status = "disabled";
43 + device_type = "pci";
44 +
45 + #address-cells = <3>;
46 + #size-cells = <2>;
47 +
48 + bus-range = <0x00 0xff>;
49 +
50 + ranges =
51 + <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
52 + 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
53 + 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
54 +
55 + pcie@1,0 {
56 + device_type = "pci";
57 + assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
58 + reg = <0x0800 0 0 0 0>;
59 + #address-cells = <3>;
60 + #size-cells = <2>;
61 + #interrupt-cells = <1>;
62 + ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
63 + 0x81000000 0 0 0x81000000 0x1 0 1 0>;
64 + interrupt-map-mask = <0 0 0 0>;
65 + interrupt-map = <0 0 0 0 &intc 9>;
66 + marvell,pcie-port = <0>;
67 + marvell,pcie-lane = <0>;
68 + clocks = <&gate_clk 2>;
69 + status = "disabled";
70 + };
71 + };
72 + };
73 +
74 ocp@f1000000 {
75 pinctrl: pinctrl@10000 {
76 compatible = "marvell,88f6281-pinctrl";
77 --- a/arch/arm/boot/dts/kirkwood-6282.dtsi
78 +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
79 @@ -1,4 +1,59 @@
80 / {
81 + mbus {
82 + pcie-controller {
83 + compatible = "marvell,kirkwood-pcie";
84 + status = "disabled";
85 + device_type = "pci";
86 +
87 + #address-cells = <3>;
88 + #size-cells = <2>;
89 +
90 + bus-range = <0x00 0xff>;
91 +
92 + ranges =
93 + <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
94 + 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
95 + 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
96 + 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
97 + 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
98 + 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
99 + 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
100 +
101 + pcie@1,0 {
102 + device_type = "pci";
103 + assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
104 + reg = <0x0800 0 0 0 0>;
105 + #address-cells = <3>;
106 + #size-cells = <2>;
107 + #interrupt-cells = <1>;
108 + ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
109 + 0x81000000 0 0 0x81000000 0x1 0 1 0>;
110 + interrupt-map-mask = <0 0 0 0>;
111 + interrupt-map = <0 0 0 0 &intc 9>;
112 + marvell,pcie-port = <0>;
113 + marvell,pcie-lane = <0>;
114 + clocks = <&gate_clk 2>;
115 + status = "disabled";
116 + };
117 +
118 + pcie@2,0 {
119 + device_type = "pci";
120 + assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
121 + reg = <0x1000 0 0 0 0>;
122 + #address-cells = <3>;
123 + #size-cells = <2>;
124 + #interrupt-cells = <1>;
125 + ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
126 + 0x81000000 0 0 0x81000000 0x2 0 1 0>;
127 + interrupt-map-mask = <0 0 0 0>;
128 + interrupt-map = <0 0 0 0 &intc 10>;
129 + marvell,pcie-port = <1>;
130 + marvell,pcie-lane = <0>;
131 + clocks = <&gate_clk 18>;
132 + status = "disabled";
133 + };
134 + };
135 + };
136 ocp@f1000000 {
137
138 pinctrl: pinctrl@10000 {
139 --- a/arch/arm/boot/dts/kirkwood-iconnect.dts
140 +++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
141 @@ -18,6 +18,17 @@
142 linux,initrd-end = <0x4800000>;
143 };
144
145 + mbus {
146 + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
147 + pcie-controller {
148 + status = "okay";
149 +
150 + pcie@1,0 {
151 + status = "okay";
152 + };
153 + };
154 + };
155 +
156 ocp@f1000000 {
157 pinctrl: pinctrl@10000 {
158
159 --- a/arch/arm/boot/dts/kirkwood-mplcec4.dts
160 +++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts
161 @@ -16,6 +16,17 @@
162 bootargs = "console=ttyS0,115200n8 earlyprintk";
163 };
164
165 + mbus {
166 + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
167 + pcie-controller {
168 + status = "okay";
169 +
170 + pcie@1,0 {
171 + status = "okay";
172 + };
173 + };
174 + };
175 +
176 ocp@f1000000 {
177 pinctrl: pinctrl@10000 {
178
179 --- a/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
180 +++ b/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
181 @@ -16,6 +16,17 @@
182 bootargs = "console=ttyS0,115200n8 earlyprintk";
183 };
184
185 + mbus {
186 + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
187 + pcie-controller {
188 + status = "okay";
189 +
190 + pcie@1,0 {
191 + status = "okay";
192 + };
193 + };
194 + };
195 +
196 ocp@f1000000 {
197 pinctrl: pinctrl@10000 {
198
199 --- a/arch/arm/boot/dts/kirkwood-nsa310.dts
200 +++ b/arch/arm/boot/dts/kirkwood-nsa310.dts
201 @@ -16,6 +16,17 @@
202 bootargs = "console=ttyS0,115200";
203 };
204
205 + mbus {
206 + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
207 + pcie-controller {
208 + status = "okay";
209 +
210 + pcie@1,0 {
211 + status = "okay";
212 + };
213 + };
214 + };
215 +
216 ocp@f1000000 {
217 pinctrl: pinctrl@10000 {
218 pinctrl-0 = <&pmx_unknown>;
219 @@ -162,14 +173,6 @@
220 reg = <0x5040000 0x2fc0000>;
221 };
222 };
223 -
224 - pcie-controller {
225 - status = "okay";
226 -
227 - pcie@1,0 {
228 - status = "okay";
229 - };
230 - };
231 };
232
233 gpio_keys {
234 --- a/arch/arm/boot/dts/kirkwood-ts219-6282.dts
235 +++ b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
236 @@ -5,6 +5,17 @@
237 #include "kirkwood-ts219.dtsi"
238
239 / {
240 + mbus {
241 + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
242 + pcie-controller {
243 + status = "okay";
244 +
245 + pcie@2,0 {
246 + status = "okay";
247 + };
248 + };
249 + };
250 +
251 ocp@f1000000 {
252 pinctrl: pinctrl@10000 {
253
254 @@ -30,14 +41,6 @@
255 marvell,function = "gpio";
256 };
257 };
258 - pcie-controller {
259 - status = "okay";
260 -
261 - pcie@2,0 {
262 - status = "okay";
263 - };
264 - };
265 -
266 };
267
268 gpio_keys {
269 --- a/arch/arm/boot/dts/kirkwood-ts219.dtsi
270 +++ b/arch/arm/boot/dts/kirkwood-ts219.dtsi
271 @@ -13,6 +13,16 @@
272 bootargs = "console=ttyS0,115200n8";
273 };
274
275 + mbus {
276 + pcie-controller {
277 + status = "okay";
278 +
279 + pcie@1,0 {
280 + status = "okay";
281 + };
282 + };
283 + };
284 +
285 ocp@f1000000 {
286 i2c@11000 {
287 status = "okay";
288 --- a/arch/arm/boot/dts/kirkwood.dtsi
289 +++ b/arch/arm/boot/dts/kirkwood.dtsi
290 @@ -20,7 +20,11 @@
291
292 mbus {
293 compatible = "marvell,kirkwood-mbus", "simple-bus";
294 + #address-cells = <2>;
295 + #size-cells = <1>;
296 controller = <&mbusc>;
297 + pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
298 + pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
299 };
300
301 ocp@f1000000 {
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