mvebu: add support for WRT32X (venom)
[openwrt/openwrt.git] / target / linux / mvebu / patches-4.14 / 413-ARM-dts-armada388-clearfog-increase-speed-of-i2c0-to.patch
1 From 6e127081e669cf163a818dc04d590790e4ed9527 Mon Sep 17 00:00:00 2001
2 From: Russell King <rmk+kernel@armlinux.org.uk>
3 Date: Tue, 29 Nov 2016 20:06:44 +0000
4 Subject: ARM: dts: armada388-clearfog: increase speed of i2c0 to 400kHz
5
6 All the devices on I2C0 support fast mode, so increase the bus speed
7 to match. The Armada 388 is known to have a timing issue when in
8 standard mode, which we believe causes the ficticious device at 0x64
9 to appear.
10
11 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
12 ---
13 arch/arm/boot/dts/armada-388-clearfog.dtsi | 7 ++-----
14 1 file changed, 2 insertions(+), 5 deletions(-)
15
16 --- a/arch/arm/boot/dts/armada-388-clearfog.dtsi
17 +++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi
18 @@ -143,8 +143,7 @@
19 };
20
21 &i2c0 {
22 - /* Is there anything on this? */
23 - clock-frequency = <100000>;
24 + clock-frequency = <400000>;
25 pinctrl-0 = <&i2c0_pins>;
26 pinctrl-names = "default";
27 status = "okay";
28 @@ -239,13 +238,11 @@
29 };
30 };
31
32 - /* The MCP3021 is 100kHz clock only */
33 + /* The MCP3021 supports standard and fast modes */
34 mikrobus_adc: mcp3021@4c {
35 compatible = "microchip,mcp3021";
36 reg = <0x4c>;
37 };
38 -
39 - /* Also something at 0x64 */
40 };
41
42 &i2c1 {