mvebu: new subtarget cortex A53
[openwrt/openwrt.git] / target / linux / mvebu / patches-4.14 / 504-spi-a3700-Change-SPI-mode-before-asserting-chip-sele.patch
1 From dd7aa8d4b53b3484ba31ba56f3ff1be7deb38530 Mon Sep 17 00:00:00 2001
2 From: Maxime Chevallier <maxime.chevallier@smile.fr>
3 Date: Tue, 10 Oct 2017 10:43:18 +0200
4 Subject: spi: a3700: Change SPI mode before asserting chip-select
5
6 The spi device mode should be configured in the controller before the
7 chip-select is asserted, so that a clock polarity configuration change
8 is not interpreted as a clock tick by the device.
9
10 This patch moves the mode setting to the 'prepare_message' function
11 instead of the 'transfer_one' function.
12
13 By doing so, this patch also removes redundant code in
14 a3700_spi_clock_set.
15
16 This was tested on EspressoBin board, with spidev.
17
18 Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr>
19 Signed-off-by: Mark Brown <broonie@kernel.org>
20 ---
21 drivers/spi/spi-armada-3700.c | 17 ++++-------------
22 1 file changed, 4 insertions(+), 13 deletions(-)
23
24 --- a/drivers/spi/spi-armada-3700.c
25 +++ b/drivers/spi/spi-armada-3700.c
26 @@ -214,7 +214,7 @@ static void a3700_spi_mode_set(struct a3
27 }
28
29 static void a3700_spi_clock_set(struct a3700_spi *a3700_spi,
30 - unsigned int speed_hz, u16 mode)
31 + unsigned int speed_hz)
32 {
33 u32 val;
34 u32 prescale;
35 @@ -239,17 +239,6 @@ static void a3700_spi_clock_set(struct a
36 val |= A3700_SPI_CLK_CAPT_EDGE;
37 spireg_write(a3700_spi, A3700_SPI_IF_TIME_REG, val);
38 }
39 -
40 - val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);
41 - val &= ~(A3700_SPI_CLK_POL | A3700_SPI_CLK_PHA);
42 -
43 - if (mode & SPI_CPOL)
44 - val |= A3700_SPI_CLK_POL;
45 -
46 - if (mode & SPI_CPHA)
47 - val |= A3700_SPI_CLK_PHA;
48 -
49 - spireg_write(a3700_spi, A3700_SPI_IF_CFG_REG, val);
50 }
51
52 static void a3700_spi_bytelen_set(struct a3700_spi *a3700_spi, unsigned int len)
53 @@ -431,7 +420,7 @@ static void a3700_spi_transfer_setup(str
54
55 a3700_spi = spi_master_get_devdata(spi->master);
56
57 - a3700_spi_clock_set(a3700_spi, xfer->speed_hz, spi->mode);
58 + a3700_spi_clock_set(a3700_spi, xfer->speed_hz);
59
60 byte_len = xfer->bits_per_word >> 3;
61
62 @@ -592,6 +581,8 @@ static int a3700_spi_prepare_message(str
63
64 a3700_spi_bytelen_set(a3700_spi, 4);
65
66 + a3700_spi_mode_set(a3700_spi, spi->mode);
67 +
68 return 0;
69 }
70