target/linux/mvebu/patches-4.9/419-net-mvneta-convert-to-phylink.patch

   1 From: Russell King <rmk+kernel@arm.linux.org.uk>
   2 Date: Wed, 16 Sep 2015 21:27:10 +0100
   3 Subject: [PATCH] net: mvneta: convert to phylink
   4
   5 Convert mvneta to use phylink, which models the MAC to PHY link in
   6 a generic, reusable form.
   7
   8 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
   9 ---
  10
  11 --- a/drivers/net/ethernet/marvell/Kconfig
  12 +++ b/drivers/net/ethernet/marvell/Kconfig
  13 @@ -57,7 +57,7 @@ config MVNETA
  14         tristate "Marvell Armada 370/38x/XP network interface support"
  15         depends on PLAT_ORION
  16         select MVMDIO
  17 -       select FIXED_PHY
  18 +       select PHYLINK
  19         ---help---
  20           This driver supports the network interface units in the
  21           Marvell ARMADA XP, ARMADA 370 and ARMADA 38x SoC family.
  22 --- a/drivers/net/ethernet/marvell/mvneta.c
  23 +++ b/drivers/net/ethernet/marvell/mvneta.c
  24 @@ -29,6 +29,7 @@
  25  #include <linux/of_net.h>
  26  #include <linux/phy.h>
  27  #include <linux/phy_fixed.h>
  28 +#include <linux/phylink.h>
  29  #include <linux/platform_device.h>
  30  #include <linux/skbuff.h>
  31  #include <net/hwbm.h>
  32 @@ -189,6 +190,7 @@
  33  #define MVNETA_GMAC_CTRL_0                       0x2c00
  34  #define      MVNETA_GMAC_MAX_RX_SIZE_SHIFT       2
  35  #define      MVNETA_GMAC_MAX_RX_SIZE_MASK        0x7ffc
  36 +#define      MVNETA_GMAC0_PORT_1000BASE_X        BIT(1)
  37  #define      MVNETA_GMAC0_PORT_ENABLE            BIT(0)
  38  #define MVNETA_GMAC_CTRL_2                       0x2c08
  39  #define      MVNETA_GMAC2_INBAND_AN_ENABLE       BIT(0)
  40 @@ -204,13 +206,19 @@
  41  #define      MVNETA_GMAC_TX_FLOW_CTRL_ENABLE     BIT(5)
  42  #define      MVNETA_GMAC_RX_FLOW_CTRL_ACTIVE     BIT(6)
  43  #define      MVNETA_GMAC_TX_FLOW_CTRL_ACTIVE     BIT(7)
  44 +#define      MVNETA_GMAC_AN_COMPLETE             BIT(11)
  45 +#define      MVNETA_GMAC_SYNC_OK                 BIT(14)
  46  #define MVNETA_GMAC_AUTONEG_CONFIG               0x2c0c
  47  #define      MVNETA_GMAC_FORCE_LINK_DOWN         BIT(0)
  48  #define      MVNETA_GMAC_FORCE_LINK_PASS         BIT(1)
  49  #define      MVNETA_GMAC_INBAND_AN_ENABLE        BIT(2)
  50 +#define      MVNETA_GMAC_AN_BYPASS_ENABLE        BIT(3)
  51 +#define      MVNETA_GMAC_INBAND_RESTART_AN       BIT(4)
  52  #define      MVNETA_GMAC_CONFIG_MII_SPEED        BIT(5)
  53  #define      MVNETA_GMAC_CONFIG_GMII_SPEED       BIT(6)
  54  #define      MVNETA_GMAC_AN_SPEED_EN             BIT(7)
  55 +#define      MVNETA_GMAC_CONFIG_FLOW_CTRL        BIT(8)
  56 +#define      MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL    BIT(9)
  57  #define      MVNETA_GMAC_AN_FLOW_CTRL_EN         BIT(11)
  58  #define      MVNETA_GMAC_CONFIG_FULL_DUPLEX      BIT(12)
  59  #define      MVNETA_GMAC_AN_DUPLEX_EN            BIT(13)
  60 @@ -400,14 +408,9 @@ struct mvneta_port {
  61         u16 tx_ring_size;
  62         u16 rx_ring_size;
  63
  64 -       struct mii_bus *mii_bus;
  65 -       phy_interface_t phy_interface;
  66 -       struct device_node *phy_node;
  67 -       unsigned int link;
  68 -       unsigned int duplex;
  69 -       unsigned int speed;
  70 +       struct device_node *dn;
  71         unsigned int tx_csum_limit;
  72 -       unsigned int use_inband_status:1;
  73 +       struct phylink *phylink;
  74
  75         struct mvneta_bm *bm_priv;
  76         struct mvneta_bm_pool *pool_long;
  77 @@ -1182,10 +1185,6 @@ static void mvneta_port_disable(struct m
  78         val &= ~MVNETA_GMAC0_PORT_ENABLE;
  79         mvreg_write(pp, MVNETA_GMAC_CTRL_0, val);
  80
  81 -       pp->link = 0;
  82 -       pp->duplex = -1;
  83 -       pp->speed = 0;
  84 -
  85         udelay(200);
  86  }
  87
  88 @@ -1245,44 +1244,6 @@ static void mvneta_set_other_mcast_table
  89                 mvreg_write(pp, MVNETA_DA_FILT_OTH_MCAST + offset, val);
  90  }
  91
  92 -static void mvneta_set_autoneg(struct mvneta_port *pp, int enable)
  93 -{
  94 -       u32 val;
  95 -
  96 -       if (enable) {
  97 -               val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
  98 -               val &= ~(MVNETA_GMAC_FORCE_LINK_PASS |
  99 -                        MVNETA_GMAC_FORCE_LINK_DOWN |
 100 -                        MVNETA_GMAC_AN_FLOW_CTRL_EN);
 101 -               val |= MVNETA_GMAC_INBAND_AN_ENABLE |
 102 -                      MVNETA_GMAC_AN_SPEED_EN |
 103 -                      MVNETA_GMAC_AN_DUPLEX_EN;
 104 -               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
 105 -
 106 -               val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
 107 -               val |= MVNETA_GMAC_1MS_CLOCK_ENABLE;
 108 -               mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val);
 109 -
 110 -               val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
 111 -               val |= MVNETA_GMAC2_INBAND_AN_ENABLE;
 112 -               mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);
 113 -       } else {
 114 -               val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
 115 -               val &= ~(MVNETA_GMAC_INBAND_AN_ENABLE |
 116 -                      MVNETA_GMAC_AN_SPEED_EN |
 117 -                      MVNETA_GMAC_AN_DUPLEX_EN);
 118 -               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
 119 -
 120 -               val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
 121 -               val &= ~MVNETA_GMAC_1MS_CLOCK_ENABLE;
 122 -               mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val);
 123 -
 124 -               val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
 125 -               val &= ~MVNETA_GMAC2_INBAND_AN_ENABLE;
 126 -               mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);
 127 -       }
 128 -}
 129 -
 130  static void mvneta_percpu_unmask_interrupt(void *arg)
 131  {
 132         struct mvneta_port *pp = arg;
 133 @@ -1430,7 +1391,6 @@ static void mvneta_defaults_set(struct m
 134         val &= ~MVNETA_PHY_POLLING_ENABLE;
 135         mvreg_write(pp, MVNETA_UNIT_CONTROL, val);
 136
 137 -       mvneta_set_autoneg(pp, pp->use_inband_status);
 138         mvneta_set_ucast_table(pp, -1);
 139         mvneta_set_special_mcast_table(pp, -1);
 140         mvneta_set_other_mcast_table(pp, -1);
 141 @@ -2635,26 +2595,11 @@ static irqreturn_t mvneta_isr(int irq, v
 142         return IRQ_HANDLED;
 143  }
 144
 145 -static int mvneta_fixed_link_update(struct mvneta_port *pp,
 146 -                                   struct phy_device *phy)
 147 +static void mvneta_link_change(struct mvneta_port *pp)
 148  {
 149 -       struct fixed_phy_status status;
 150 -       struct fixed_phy_status changed = {};
 151         u32 gmac_stat = mvreg_read(pp, MVNETA_GMAC_STATUS);
 152
 153 -       status.link = !!(gmac_stat & MVNETA_GMAC_LINK_UP);
 154 -       if (gmac_stat & MVNETA_GMAC_SPEED_1000)
 155 -               status.speed = SPEED_1000;
 156 -       else if (gmac_stat & MVNETA_GMAC_SPEED_100)
 157 -               status.speed = SPEED_100;
 158 -       else
 159 -               status.speed = SPEED_10;
 160 -       status.duplex = !!(gmac_stat & MVNETA_GMAC_FULL_DUPLEX);
 161 -       changed.link = 1;
 162 -       changed.speed = 1;
 163 -       changed.duplex = 1;
 164 -       fixed_phy_update_state(phy, &status, &changed);
 165 -       return 0;
 166 +       phylink_mac_change(pp->phylink, !!(gmac_stat & MVNETA_GMAC_LINK_UP));
 167  }
 168
 169  /* NAPI handler
 170 @@ -2670,7 +2615,6 @@ static int mvneta_poll(struct napi_struc
 171         u32 cause_rx_tx;
 172         int rx_queue;
 173         struct mvneta_port *pp = netdev_priv(napi->dev);
 174 -       struct net_device *ndev = pp->dev;
 175         struct mvneta_pcpu_port *port = this_cpu_ptr(pp->ports);
 176
 177         if (!netif_running(pp->dev)) {
 178 @@ -2684,12 +2628,11 @@ static int mvneta_poll(struct napi_struc
 179                 u32 cause_misc = mvreg_read(pp, MVNETA_INTR_MISC_CAUSE);
 180
 181                 mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
 182 -               if (pp->use_inband_status && (cause_misc &
 183 -                               (MVNETA_CAUSE_PHY_STATUS_CHANGE |
 184 -                                MVNETA_CAUSE_LINK_CHANGE |
 185 -                                MVNETA_CAUSE_PSC_SYNC_CHANGE))) {
 186 -                       mvneta_fixed_link_update(pp, ndev->phydev);
 187 -               }
 188 +
 189 +               if (cause_misc & (MVNETA_CAUSE_PHY_STATUS_CHANGE |
 190 +                                 MVNETA_CAUSE_LINK_CHANGE |
 191 +                                 MVNETA_CAUSE_PSC_SYNC_CHANGE))
 192 +                       mvneta_link_change(pp);
 193         }
 194
 195         /* Release Tx descriptors */
 196 @@ -2985,7 +2928,6 @@ static int mvneta_setup_txqs(struct mvne
 197  static void mvneta_start_dev(struct mvneta_port *pp)
 198  {
 199         int cpu;
 200 -       struct net_device *ndev = pp->dev;
 201
 202         mvneta_max_rx_size_set(pp, pp->pkt_size);
 203         mvneta_txq_max_tx_size_set(pp, pp->pkt_size);
 204 @@ -3008,16 +2950,15 @@ static void mvneta_start_dev(struct mvne
 205                     MVNETA_CAUSE_LINK_CHANGE |
 206                     MVNETA_CAUSE_PSC_SYNC_CHANGE);
 207
 208 -       phy_start(ndev->phydev);
 209 +       phylink_start(pp->phylink);
 210         netif_tx_start_all_queues(pp->dev);
 211  }
 212
 213  static void mvneta_stop_dev(struct mvneta_port *pp)
 214  {
 215         unsigned int cpu;
 216 -       struct net_device *ndev = pp->dev;
 217
 218 -       phy_stop(ndev->phydev);
 219 +       phylink_stop(pp->phylink);
 220
 221         for_each_online_cpu(cpu) {
 222                 struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu);
 223 @@ -3187,99 +3128,210 @@ static int mvneta_set_mac_addr(struct ne
 224         return 0;
 225  }
 226
 227 -static void mvneta_adjust_link(struct net_device *ndev)
 228 +static void mvneta_validate_support(struct net_device *ndev, unsigned int mode,
 229 +                                   unsigned long *support)
 230 +{
 231 +       __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 232 +
 233 +       /* Allow all the expected bits */
 234 +       phylink_set(mask, Autoneg);
 235 +       phylink_set(mask, TP);
 236 +       phylink_set(mask, AUI);
 237 +       phylink_set(mask, MII);
 238 +       phylink_set(mask, FIBRE);
 239 +       phylink_set(mask, BNC);
 240 +       phylink_set(mask, Backplane);
 241 +
 242 +       /* Half-duplex at speeds higher than 100Mbit is unsupported */
 243 +       phylink_set(mask, 1000baseT_Full);
 244 +       phylink_set(mask, 1000baseX_Full);
 245 +
 246 +       if (mode != MLO_AN_8023Z) {
 247 +               /* 10M and 100M are only supported in non-802.3z mode */
 248 +               phylink_set(mask, 10baseT_Half);
 249 +               phylink_set(mask, 10baseT_Full);
 250 +               phylink_set(mask, 100baseT_Half);
 251 +               phylink_set(mask, 100baseT_Full);
 252 +       } else {
 253 +               phylink_set(mask, Pause);
 254 +       }
 255 +
 256 +       bitmap_and(support, support, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
 257 +}
 258 +
 259 +static int mvneta_mac_link_state(struct net_device *ndev,
 260 +                                struct phylink_link_state *state)
 261  {
 262         struct mvneta_port *pp = netdev_priv(ndev);
 263 -       struct phy_device *phydev = ndev->phydev;
 264 -       int status_change = 0;
 265 +       u32 gmac_stat;
 266
 267 -       if (phydev->link) {
 268 -               if ((pp->speed != phydev->speed) ||
 269 -                   (pp->duplex != phydev->duplex)) {
 270 -                       u32 val;
 271 -
 272 -                       val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
 273 -                       val &= ~(MVNETA_GMAC_CONFIG_MII_SPEED |
 274 -                                MVNETA_GMAC_CONFIG_GMII_SPEED |
 275 -                                MVNETA_GMAC_CONFIG_FULL_DUPLEX);
 276 -
 277 -                       if (phydev->duplex)
 278 -                               val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
 279 -
 280 -                       if (phydev->speed == SPEED_1000)
 281 -                               val |= MVNETA_GMAC_CONFIG_GMII_SPEED;
 282 -                       else if (phydev->speed == SPEED_100)
 283 -                               val |= MVNETA_GMAC_CONFIG_MII_SPEED;
 284 +       gmac_stat = mvreg_read(pp, MVNETA_GMAC_STATUS);
 285
 286 -                       mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
 287 +       if (gmac_stat & MVNETA_GMAC_SPEED_1000)
 288 +               state->speed = SPEED_1000;
 289 +       else if (gmac_stat & MVNETA_GMAC_SPEED_100)
 290 +               state->speed = SPEED_100;
 291 +       else
 292 +               state->speed = SPEED_10;
 293
 294 -                       pp->duplex = phydev->duplex;
 295 -                       pp->speed  = phydev->speed;
 296 -               }
 297 +       state->an_complete = !!(gmac_stat & MVNETA_GMAC_AN_COMPLETE);
 298 +       state->link = !!(gmac_stat & MVNETA_GMAC_LINK_UP);
 299 +       state->duplex = !!(gmac_stat & MVNETA_GMAC_FULL_DUPLEX);
 300 +
 301 +       return 1;
 302 +}
 303 +
 304 +static void mvneta_mac_an_restart(struct net_device *ndev, unsigned int mode)
 305 +{
 306 +       struct mvneta_port *pp = netdev_priv(ndev);
 307 +
 308 +       if (mode == MLO_AN_8023Z) {
 309 +               u32 gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
 310 +
 311 +               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
 312 +                           gmac_an | MVNETA_GMAC_INBAND_RESTART_AN);
 313 +               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
 314 +                           gmac_an & ~MVNETA_GMAC_INBAND_RESTART_AN);
 315         }
 316 +}
 317
 318 -       if (phydev->link != pp->link) {
 319 -               if (!phydev->link) {
 320 -                       pp->duplex = -1;
 321 -                       pp->speed = 0;
 322 -               }
 323 +static void mvneta_mac_config(struct net_device *ndev, unsigned int mode,
 324 +       const struct phylink_link_state *state)
 325 +{
 326 +       struct mvneta_port *pp = netdev_priv(ndev);
 327 +       u32 new_ctrl0, gmac_ctrl0 = mvreg_read(pp, MVNETA_GMAC_CTRL_0);
 328 +       u32 new_ctrl2, gmac_ctrl2 = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
 329 +       u32 new_clk, gmac_clk = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
 330 +       u32 new_an, gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
 331 +
 332 +       new_ctrl0 = gmac_ctrl0 & ~MVNETA_GMAC0_PORT_1000BASE_X;
 333 +       new_ctrl2 = gmac_ctrl2 & ~MVNETA_GMAC2_INBAND_AN_ENABLE;
 334 +       new_clk = gmac_clk & ~MVNETA_GMAC_1MS_CLOCK_ENABLE;
 335 +       new_an = gmac_an & ~(MVNETA_GMAC_INBAND_AN_ENABLE |
 336 +                            MVNETA_GMAC_INBAND_RESTART_AN |
 337 +                            MVNETA_GMAC_CONFIG_MII_SPEED |
 338 +                            MVNETA_GMAC_CONFIG_GMII_SPEED |
 339 +                            MVNETA_GMAC_AN_SPEED_EN |
 340 +                            MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL |
 341 +                            MVNETA_GMAC_CONFIG_FLOW_CTRL |
 342 +                            MVNETA_GMAC_AN_FLOW_CTRL_EN |
 343 +                            MVNETA_GMAC_CONFIG_FULL_DUPLEX |
 344 +                            MVNETA_GMAC_AN_DUPLEX_EN);
 345 +
 346 +       if (phylink_test(state->advertising, Pause))
 347 +               new_an |= MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL;
 348 +
 349 +       switch (mode) {
 350 +       case MLO_AN_SGMII:
 351 +               /* SGMII mode receives the state from the PHY */
 352 +               new_ctrl2 |= MVNETA_GMAC2_INBAND_AN_ENABLE;
 353 +               new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE;
 354 +               new_an = (new_an & ~(MVNETA_GMAC_FORCE_LINK_DOWN |
 355 +                                    MVNETA_GMAC_FORCE_LINK_PASS)) |
 356 +                        MVNETA_GMAC_INBAND_AN_ENABLE |
 357 +                        MVNETA_GMAC_AN_SPEED_EN |
 358 +                        MVNETA_GMAC_AN_DUPLEX_EN;
 359 +               break;
 360
 361 -               pp->link = phydev->link;
 362 -               status_change = 1;
 363 +       case MLO_AN_8023Z:
 364 +               /* 802.3z negotiation - only 1000base-X */
 365 +               new_ctrl0 |= MVNETA_GMAC0_PORT_1000BASE_X;
 366 +               new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE;
 367 +               new_an = (new_an & ~(MVNETA_GMAC_FORCE_LINK_DOWN |
 368 +                                    MVNETA_GMAC_FORCE_LINK_PASS)) |
 369 +                        MVNETA_GMAC_INBAND_AN_ENABLE |
 370 +                        MVNETA_GMAC_CONFIG_GMII_SPEED |
 371 +                        /* The MAC only supports FD mode */
 372 +                        MVNETA_GMAC_CONFIG_FULL_DUPLEX;
 373 +
 374 +               if (state->an_enabled)
 375 +                       new_an |= MVNETA_GMAC_AN_FLOW_CTRL_EN;
 376 +               break;
 377 +
 378 +       default:
 379 +               /* Phy or fixed speed */
 380 +               if (state->duplex)
 381 +                       new_an |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
 382 +
 383 +               if (state->speed == SPEED_1000)
 384 +                       new_an |= MVNETA_GMAC_CONFIG_GMII_SPEED;
 385 +               else if (state->speed == SPEED_100)
 386 +                       new_an |= MVNETA_GMAC_CONFIG_MII_SPEED;
 387 +               break;
 388         }
 389
 390 -       if (status_change) {
 391 -               if (phydev->link) {
 392 -                       if (!pp->use_inband_status) {
 393 -                               u32 val = mvreg_read(pp,
 394 -                                                 MVNETA_GMAC_AUTONEG_CONFIG);
 395 -                               val &= ~MVNETA_GMAC_FORCE_LINK_DOWN;
 396 -                               val |= MVNETA_GMAC_FORCE_LINK_PASS;
 397 -                               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
 398 -                                           val);
 399 -                       }
 400 -                       mvneta_port_up(pp);
 401 -               } else {
 402 -                       if (!pp->use_inband_status) {
 403 -                               u32 val = mvreg_read(pp,
 404 -                                                 MVNETA_GMAC_AUTONEG_CONFIG);
 405 -                               val &= ~MVNETA_GMAC_FORCE_LINK_PASS;
 406 -                               val |= MVNETA_GMAC_FORCE_LINK_DOWN;
 407 -                               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
 408 -                                           val);
 409 -                       }
 410 -                       mvneta_port_down(pp);
 411 -               }
 412 -               phy_print_status(phydev);
 413 +       /* Armada 370 documentation says we can only change the port mode
 414 +        * and in-band enable when the link is down, so force it down
 415 +        * while making these changes. We also do this for GMAC_CTRL2 */
 416 +       if ((new_ctrl0 ^ gmac_ctrl0) & MVNETA_GMAC0_PORT_1000BASE_X ||
 417 +           (new_ctrl2 ^ gmac_ctrl2) & MVNETA_GMAC2_INBAND_AN_ENABLE ||
 418 +           (new_an  ^ gmac_an) & MVNETA_GMAC_INBAND_AN_ENABLE) {
 419 +               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG,
 420 +                           (gmac_an & ~MVNETA_GMAC_FORCE_LINK_PASS) |
 421 +                           MVNETA_GMAC_FORCE_LINK_DOWN);
 422 +       }
 423 +
 424 +       if (new_ctrl0 != gmac_ctrl0)
 425 +               mvreg_write(pp, MVNETA_GMAC_CTRL_0, new_ctrl0);
 426 +       if (new_ctrl2 != gmac_ctrl2)
 427 +               mvreg_write(pp, MVNETA_GMAC_CTRL_2, new_ctrl2);
 428 +       if (new_clk != gmac_clk)
 429 +               mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, new_clk);
 430 +       if (new_an != gmac_an)
 431 +               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, new_an);
 432 +}
 433 +
 434 +static void mvneta_mac_link_down(struct net_device *ndev, unsigned int mode)
 435 +{
 436 +       struct mvneta_port *pp = netdev_priv(ndev);
 437 +       u32 val;
 438 +
 439 +       mvneta_port_down(pp);
 440 +
 441 +       if (mode == MLO_AN_PHY || mode == MLO_AN_FIXED) {
 442 +               val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
 443 +               val &= ~MVNETA_GMAC_FORCE_LINK_PASS;
 444 +               val |= MVNETA_GMAC_FORCE_LINK_DOWN;
 445 +               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
 446         }
 447  }
 448
 449 -static int mvneta_mdio_probe(struct mvneta_port *pp)
 450 +static void mvneta_mac_link_up(struct net_device *ndev, unsigned int mode)
 451  {
 452 -       struct phy_device *phy_dev;
 453 +       struct mvneta_port *pp = netdev_priv(ndev);
 454 +       u32 val;
 455
 456 -       phy_dev = of_phy_connect(pp->dev, pp->phy_node, mvneta_adjust_link, 0,
 457 -                                pp->phy_interface);
 458 -       if (!phy_dev) {
 459 -               netdev_err(pp->dev, "could not find the PHY\n");
 460 -               return -ENODEV;
 461 +       if (mode == MLO_AN_PHY || mode == MLO_AN_FIXED) {
 462 +               val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
 463 +               val &= ~MVNETA_GMAC_FORCE_LINK_DOWN;
 464 +               val |= MVNETA_GMAC_FORCE_LINK_PASS;
 465 +               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
 466         }
 467
 468 -       phy_dev->supported &= PHY_GBIT_FEATURES;
 469 -       phy_dev->advertising = phy_dev->supported;
 470 +       mvneta_port_up(pp);
 471 +}
 472
 473 -       pp->link    = 0;
 474 -       pp->duplex  = 0;
 475 -       pp->speed   = 0;
 476 +static const struct phylink_mac_ops mvneta_phylink_ops = {
 477 +       .validate_support = mvneta_validate_support,
 478 +       .mac_link_state = mvneta_mac_link_state,
 479 +       .mac_an_restart = mvneta_mac_an_restart,
 480 +       .mac_config = mvneta_mac_config,
 481 +       .mac_link_down = mvneta_mac_link_down,
 482 +       .mac_link_up = mvneta_mac_link_up,
 483 +};
 484
 485 -       return 0;
 486 +static int mvneta_mdio_probe(struct mvneta_port *pp)
 487 +{
 488 +       int err = phylink_of_phy_connect(pp->phylink, pp->dn);
 489 +       if (err)
 490 +               netdev_err(pp->dev, "could not attach PHY\n");
 491 +
 492 +       return err;
 493  }
 494
 495  static void mvneta_mdio_remove(struct mvneta_port *pp)
 496  {
 497 -       struct net_device *ndev = pp->dev;
 498 -
 499 -       phy_disconnect(ndev->phydev);
 500 +       phylink_disconnect_phy(pp->phylink);
 501  }
 502
 503  /* Electing a CPU must be done in an atomic way: it should be done
 504 @@ -3537,10 +3589,9 @@ static int mvneta_stop(struct net_device
 505
 506  static int mvneta_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 507  {
 508 -       if (!dev->phydev)
 509 -               return -ENOTSUPP;
 510 +       struct mvneta_port *pp = netdev_priv(dev);
 511
 512 -       return phy_mii_ioctl(dev->phydev, ifr, cmd);
 513 +       return phylink_mii_ioctl(pp->phylink, ifr, cmd);
 514  }
 515
 516  /* Ethtool methods */
 517 @@ -3551,44 +3602,18 @@ mvneta_ethtool_set_link_ksettings(struct
 518                                   const struct ethtool_link_ksettings *cmd)
 519  {
 520         struct mvneta_port *pp = netdev_priv(ndev);
 521 -       struct phy_device *phydev = ndev->phydev;
 522 -
 523 -       if (!phydev)
 524 -               return -ENODEV;
 525
 526 -       if ((cmd->base.autoneg == AUTONEG_ENABLE) != pp->use_inband_status) {
 527 -               u32 val;
 528 -
 529 -               mvneta_set_autoneg(pp, cmd->base.autoneg == AUTONEG_ENABLE);
 530 -
 531 -               if (cmd->base.autoneg == AUTONEG_DISABLE) {
 532 -                       val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
 533 -                       val &= ~(MVNETA_GMAC_CONFIG_MII_SPEED |
 534 -                                MVNETA_GMAC_CONFIG_GMII_SPEED |
 535 -                                MVNETA_GMAC_CONFIG_FULL_DUPLEX);
 536 -
 537 -                       if (phydev->duplex)
 538 -                               val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
 539 -
 540 -                       if (phydev->speed == SPEED_1000)
 541 -                               val |= MVNETA_GMAC_CONFIG_GMII_SPEED;
 542 -                       else if (phydev->speed == SPEED_100)
 543 -                               val |= MVNETA_GMAC_CONFIG_MII_SPEED;
 544 -
 545 -                       mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
 546 -               }
 547 +       return phylink_ethtool_ksettings_set(pp->phylink, cmd);
 548 +}
 549
 550 -               pp->use_inband_status = (cmd->base.autoneg == AUTONEG_ENABLE);
 551 -               netdev_info(pp->dev, "autoneg status set to %i\n",
 552 -                           pp->use_inband_status);
 553 -
 554 -               if (netif_running(ndev)) {
 555 -                       mvneta_port_down(pp);
 556 -                       mvneta_port_up(pp);
 557 -               }
 558 -       }
 559 +/* Get link ksettings for ethtools */
 560 +static int
 561 +mvneta_ethtool_get_link_ksettings(struct net_device *ndev,
 562 +                                 struct ethtool_link_ksettings *cmd)
 563 +{
 564 +       struct mvneta_port *pp = netdev_priv(ndev);
 565
 566 -       return phy_ethtool_ksettings_set(ndev->phydev, cmd);
 567 +       return phylink_ethtool_ksettings_get(pp->phylink, cmd);
 568  }
 569
 570  /* Set interrupt coalescing for ethtools */
 571 @@ -3696,26 +3721,28 @@ static void mvneta_ethtool_update_stats(
 572  {
 573         const struct mvneta_statistic *s;
 574         void __iomem *base = pp->base;
 575 -       u32 high, low, val;
 576 -       u64 val64;
 577 +       u32 high, low;
 578 +       u64 val;
 579         int i;
 580
 581         for (i = 0, s = mvneta_statistics;
 582              s < mvneta_statistics + ARRAY_SIZE(mvneta_statistics);
 583              s++, i++) {
 584 +               val = 0;
 585 +
 586                 switch (s->type) {
 587                 case T_REG_32:
 588                         val = readl_relaxed(base + s->offset);
 589 -                       pp->ethtool_stats[i] += val;
 590                         break;
 591                 case T_REG_64:
 592                         /* Docs say to read low 32-bit then high */
 593                         low = readl_relaxed(base + s->offset);
 594                         high = readl_relaxed(base + s->offset + 4);
 595 -                       val64 = (u64)high << 32 | low;
 596 -                       pp->ethtool_stats[i] += val64;
 597 +                       val = (u64)high << 32 | low;
 598                         break;
 599                 }
 600 +
 601 +               pp->ethtool_stats[i] += val;
 602         }
 603  }
 604
 605 @@ -3875,7 +3902,7 @@ const struct ethtool_ops mvneta_eth_tool
 606         .get_rxnfc      = mvneta_ethtool_get_rxnfc,
 607         .get_rxfh       = mvneta_ethtool_get_rxfh,
 608         .set_rxfh       = mvneta_ethtool_set_rxfh,
 609 -       .get_link_ksettings = phy_ethtool_get_link_ksettings,
 610 +       .get_link_ksettings = mvneta_ethtool_get_link_ksettings,
 611         .set_link_ksettings = mvneta_ethtool_set_link_ksettings,
 612  };
 613
 614 @@ -4002,14 +4029,13 @@ static int mvneta_probe(struct platform_
 615         const struct mbus_dram_target_info *dram_target_info;
 616         struct resource *res;
 617         struct device_node *dn = pdev->dev.of_node;
 618 -       struct device_node *phy_node;
 619         struct device_node *bm_node;
 620         struct mvneta_port *pp;
 621         struct net_device *dev;
 622 +       struct phylink *phylink;
 623         const char *dt_mac_addr;
 624         char hw_mac_addr[ETH_ALEN];
 625         const char *mac_from;
 626 -       const char *managed;
 627         int tx_csum_limit;
 628         int phy_mode;
 629         int err;
 630 @@ -4025,31 +4051,11 @@ static int mvneta_probe(struct platform_
 631                 goto err_free_netdev;
 632         }
 633
 634 -       phy_node = of_parse_phandle(dn, "phy", 0);
 635 -       if (!phy_node) {
 636 -               if (!of_phy_is_fixed_link(dn)) {
 637 -                       dev_err(&pdev->dev, "no PHY specified\n");
 638 -                       err = -ENODEV;
 639 -                       goto err_free_irq;
 640 -               }
 641 -
 642 -               err = of_phy_register_fixed_link(dn);
 643 -               if (err < 0) {
 644 -                       dev_err(&pdev->dev, "cannot register fixed PHY\n");
 645 -                       goto err_free_irq;
 646 -               }
 647 -
 648 -               /* In the case of a fixed PHY, the DT node associated
 649 -                * to the PHY is the Ethernet MAC DT node.
 650 -                */
 651 -               phy_node = of_node_get(dn);
 652 -       }
 653 -
 654         phy_mode = of_get_phy_mode(dn);
 655         if (phy_mode < 0) {
 656                 dev_err(&pdev->dev, "incorrect phy-mode\n");
 657                 err = -EINVAL;
 658 -               goto err_put_phy_node;
 659 +               goto err_free_irq;
 660         }
 661
 662         dev->tx_queue_len = MVNETA_MAX_TXD;
 663 @@ -4060,12 +4066,7 @@ static int mvneta_probe(struct platform_
 664
 665         pp = netdev_priv(dev);
 666         spin_lock_init(&pp->lock);
 667 -       pp->phy_node = phy_node;
 668 -       pp->phy_interface = phy_mode;
 669 -
 670 -       err = of_property_read_string(dn, "managed", &managed);
 671 -       pp->use_inband_status = (err == 0 &&
 672 -                                strcmp(managed, "in-band-status") == 0);
 673 +       pp->dn = dn;
 674
 675         pp->rxq_def = rxq_def;
 676
 677 @@ -4076,7 +4077,7 @@ static int mvneta_probe(struct platform_
 678                 pp->clk = devm_clk_get(&pdev->dev, NULL);
 679         if (IS_ERR(pp->clk)) {
 680                 err = PTR_ERR(pp->clk);
 681 -               goto err_put_phy_node;
 682 +               goto err_free_irq;
 683         }
 684
 685         clk_prepare_enable(pp->clk);
 686 @@ -4184,6 +4185,14 @@ static int mvneta_probe(struct platform_
 687         dev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
 688         dev->gso_max_segs = MVNETA_MAX_TSO_SEGS;
 689
 690 +       phylink = phylink_create(dev, dn, phy_mode, &mvneta_phylink_ops);
 691 +       if (IS_ERR(phylink)) {
 692 +               err = PTR_ERR(phylink);
 693 +               goto err_free_stats;
 694 +       }
 695 +
 696 +       pp->phylink = phylink;
 697 +
 698         err = register_netdev(dev);
 699         if (err < 0) {
 700                 dev_err(&pdev->dev, "failed to register\n");
 701 @@ -4195,14 +4204,6 @@ static int mvneta_probe(struct platform_
 702
 703         platform_set_drvdata(pdev, pp->dev);
 704
 705 -       if (pp->use_inband_status) {
 706 -               struct phy_device *phy = of_phy_find_device(dn);
 707 -
 708 -               mvneta_fixed_link_update(pp, phy);
 709 -
 710 -               put_device(&phy->mdio.dev);
 711 -       }
 712 -
 713         return 0;
 714
 715  err_netdev:
 716 @@ -4213,16 +4214,14 @@ err_netdev:
 717                                        1 << pp->id);
 718         }
 719  err_free_stats:
 720 +       if (pp->phylink)
 721 +               phylink_destroy(pp->phylink);
 722         free_percpu(pp->stats);
 723  err_free_ports:
 724         free_percpu(pp->ports);
 725  err_clk:
 726         clk_disable_unprepare(pp->clk_bus);
 727         clk_disable_unprepare(pp->clk);
 728 -err_put_phy_node:
 729 -       of_node_put(phy_node);
 730 -       if (of_phy_is_fixed_link(dn))
 731 -               of_phy_deregister_fixed_link(dn);
 732  err_free_irq:
 733         irq_dispose_mapping(dev->irq);
 734  err_free_netdev:
 735 @@ -4234,7 +4233,6 @@ err_free_netdev:
 736  static int mvneta_remove(struct platform_device *pdev)
 737  {
 738         struct net_device  *dev = platform_get_drvdata(pdev);
 739 -       struct device_node *dn = pdev->dev.of_node;
 740         struct mvneta_port *pp = netdev_priv(dev);
 741
 742         unregister_netdev(dev);
 743 @@ -4242,10 +4240,8 @@ static int mvneta_remove(struct platform
 744         clk_disable_unprepare(pp->clk);
 745         free_percpu(pp->ports);
 746         free_percpu(pp->stats);
 747 -       if (of_phy_is_fixed_link(dn))
 748 -               of_phy_deregister_fixed_link(dn);
 749         irq_dispose_mapping(dev->irq);
 750 -       of_node_put(pp->phy_node);
 751 +       phylink_destroy(pp->phylink);
 752         free_netdev(dev);
 753
 754         if (pp->bm_priv) {