target/linux/mvebu/patches-5.4/021-arm64-dts-marvell-armada-37xx-Move-PCIe-comphy-handl.patch

   1 From df749cdb015011e9ed8b60ebb84b4e76a9f35735 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
   3 Date: Thu, 30 Apr 2020 10:06:24 +0200
   4 Subject: [PATCH] arm64: dts: marvell: armada-37xx: Move PCIe comphy handle
   5  property
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Move the comphy handle property of the PCIe node from board specific
  11 device tree files (EspressoBin and Turris Mox) to the generic
  12 armada-37xx.dtsi.
  13
  14 This is correct since this is the only possible PCIe PHY configuration
  15 on Armada 37xx, so when PCIe is enabled on any board, this handle is
  16 correct.
  17
  18 Signed-off-by: Marek Behún <marek.behun@nic.cz>
  19 Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
  20 Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
  21 Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
  22 ---
  23  arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi | 1 -
  24  arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts   | 1 -
  25  arch/arm64/boot/dts/marvell/armada-37xx.dtsi             | 1 +
  26  3 files changed, 1 insertion(+), 2 deletions(-)
  27
  28 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
  29 +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
  30 @@ -56,7 +56,6 @@
  31  /* J9 */
  32  &pcie0 {
  33         status = "okay";
  34 -       phys = <&comphy1 0>;
  35         pinctrl-names = "default";
  36         pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
  37         reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
  38 --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
  39 +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
  40 @@ -133,7 +133,6 @@
  41         status = "okay";
  42         max-link-speed = <2>;
  43         reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
  44 -       phys = <&comphy1 0>;
  45         /*
  46          * U-Boot port for Turris Mox has a bug which always expects that "ranges" DT property
  47          * contains exactly 2 ranges with 3 (child) address cells, 2 (parent) address cells and
  48 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
  49 +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
  50 @@ -501,6 +501,7 @@
  51                                         <0 0 0 2 &pcie_intc 1>,
  52                                         <0 0 0 3 &pcie_intc 2>,
  53                                         <0 0 0 4 &pcie_intc 3>;
  54 +                       phys = <&comphy1 0>;
  55                         pcie_intc: interrupt-controller {
  56                                 interrupt-controller;
  57                                 #interrupt-cells = <1>;