target/linux/omap/patches-3.12/201-ARM-dts-omap-Add-new-bindings-for-OMAP.patch

   1 On OMAP we have co-processor IPs, memory controllers,
   2 GPIOs which control regulators and power switches to
   3 PMIC, and SoC internal Bus IPs, some or most of which
   4 should either not be reset or idled or both at init.
   5 (In some cases there are erratas which prevent an IP
   6 from being reset)
   7 Have a way to pass this information from DT.
   8
   9 Update the am33xx/omap4 and omap5 dtsi files with the
  10 new bindings for modules which either should not be
  11 idled. reset or both. A later patch would cleanup the
  12 same information that exists today as part of the hwmod
  13 data files.
  14
  15 Signed-off-by: Rajendra Nayak <rnayak@ti.com>
  16
  17 ---
  18 .../devicetree/bindings/arm/omap/omap.txt          |    3 ++-
  19  arch/arm/boot/dts/am33xx.dtsi                      |    2 ++
  20  arch/arm/boot/dts/omap4.dtsi                       |    3 +++
  21  arch/arm/boot/dts/omap5.dtsi                       |    2 ++
  22  4 files changed, 9 insertions(+), 1 deletion(-)
  23
  24 diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt
  25 index 91b7049..808c154 100644
  26 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt
  27 +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
  28 @@ -21,7 +21,8 @@ Required properties:
  29  Optional properties:
  30  - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module
  31    during suspend.
  32 -
  33 +- ti,no-reset-on-init: When present, the module should not be reset at init
  34 +- ti,no-idle-on-init: When present, the module should not be idled at init
  35
  36  Example:
  37
  38 diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
  39 index f9c5da9..ec33ea0 100644
  40 --- a/arch/arm/boot/dts/am33xx.dtsi
  41 +++ b/arch/arm/boot/dts/am33xx.dtsi
  42 @@ -607,6 +607,7 @@
  43                         reg = <0x44d00000 0x4000        /* M3 UMEM */
  44                                0x44d80000 0x2000>;      /* M3 DMEM */
  45                         ti,hwmods = "wkup_m3";
  46 +                       ti,no-reset-on-init;
  47                 };
  48
  49                 elm: elm@48080000 {
  50 @@ -637,6 +638,7 @@
  51                 gpmc: gpmc@50000000 {
  52                         compatible = "ti,am3352-gpmc";
  53                         ti,hwmods = "gpmc";
  54 +                       ti,no-idle-on-init;
  55                         reg = <0x50000000 0x2000>;
  56                         interrupts = <100>;
  57                         gpmc,num-cs = <7>;
  58 diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
  59 index 22d9f2b..e8fe797 100644
  60 --- a/arch/arm/boot/dts/omap4.dtsi
  61 +++ b/arch/arm/boot/dts/omap4.dtsi
  62 @@ -214,6 +214,7 @@
  63                         gpmc,num-cs = <8>;
  64                         gpmc,num-waitpins = <4>;
  65                         ti,hwmods = "gpmc";
  66 +                       ti,no-idle-on-init;
  67                 };
  68
  69                 uart1: serial@4806a000 {
  70 @@ -492,6 +493,7 @@
  71                         reg = <0x4c000000 0x100>;
  72                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
  73                         ti,hwmods = "emif1";
  74 +                       ti,no-idle-on-init;
  75                         phy-type = <1>;
  76                         hw-caps-read-idle-ctrl;
  77                         hw-caps-ll-interface;
  78 @@ -503,6 +505,7 @@
  79                         reg = <0x4d000000 0x100>;
  80                         interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
  81                         ti,hwmods = "emif2";
  82 +                       ti,no-idle-on-init;
  83                         phy-type = <1>;
  84                         hw-caps-read-idle-ctrl;
  85                         hw-caps-ll-interface;
  86 diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
  87 index 7cdea1b..a9d49df 100644
  88 --- a/arch/arm/boot/dts/omap5.dtsi
  89 +++ b/arch/arm/boot/dts/omap5.dtsi
  90 @@ -607,6 +607,7 @@
  91                 emif1: emif@0x4c000000 {
  92                         compatible      = "ti,emif-4d5";
  93                         ti,hwmods       = "emif1";
  94 +                       ti,no-idle-on-init;
  95                         phy-type        = <2>; /* DDR PHY type: Intelli PHY */
  96                         reg = <0x4c000000 0x400>;
  97                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
  98 @@ -618,6 +619,7 @@
  99                 emif2: emif@0x4d000000 {
 100                         compatible      = "ti,emif-4d5";
 101                         ti,hwmods       = "emif2";
 102 +                       ti,no-idle-on-init;
 103                         phy-type        = <2>; /* DDR PHY type: Intelli PHY */
 104                         reg = <0x4d000000 0x400>;
 105                         interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;