target/linux/pxa/patches-3.10/003-gumstix_h_verdex_pro_support.patch

   1 From adb6abbe4e3bc17c20cdc70e4a4357f1633d4970 Mon Sep 17 00:00:00 2001
   2 From: Joseph Kortje <jpktech@rogers.com>
   3 Date: Wed, 28 Oct 2009 21:49:11 -0400
   4 Subject: [PATCH] [ARM] gumstix.h: Verdex Pro support
   5
   6 Added a bunch of ifdefs to support both original gumstix boards
   7 as well as the Verdex Pro in gumstix.h
   8
   9 Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
  10 ---
  11  arch/arm/mach-pxa/include/mach/gumstix.h |  160 ++++++++++++++++++++++++------
  12  1 files changed, 130 insertions(+), 30 deletions(-)
  13
  14 --- a/arch/arm/mach-pxa/include/mach/gumstix.h
  15 +++ b/arch/arm/mach-pxa/include/mach/gumstix.h
  16 @@ -6,6 +6,9 @@
  17   * published by the Free Software Foundation.
  18   */
  19
  20 +#if !defined(__ASM_ARCH_MFP_PXA27X_H) && !defined(__ASM_ARCH_MFP_PXA25X_H)
  21 +       #error You need to include either mfp-pxa27x.h or mfp-pxa25x.h
  22 +#endif
  23
  24  /* BTRESET - Reset line to Bluetooth module, active low signal. */
  25  #define GPIO_GUMSTIX_BTRESET          7
  26 @@ -20,9 +23,18 @@ this moves to GPIO17 and GPIO37. */
  27  /* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn
  28  has detected a cable insertion; driven low otherwise. */
  29
  30 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
  31 +
  32  #define GPIO_GUMSTIX_USB_GPIOn         35
  33  #define GPIO_GUMSTIX_USB_GPIOx         41
  34
  35 +#else
  36 +
  37 +#define GPIO_GUMSTIX_USB_GPIOn         100
  38 +#define GPIO_GUMSTIX_USB_GPIOx         27
  39 +
  40 +#endif
  41 +
  42  /* usb state change */
  43  #define GUMSTIX_USB_INTR_IRQ           PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)
  44
  45 @@ -42,48 +54,136 @@ has detected a cable insertion; driven l
  46   * ETH_RST provides a hardware reset line to the ethernet chip
  47   * ETH is the IRQ line in from the ethernet chip to the PXA
  48   */
  49 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
  50  #define GPIO_GUMSTIX_ETH0_RST          80
  51 -#define GPIO_GUMSTIX_ETH0_RST_MD       (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
  52 +#define GPIO_GUMSTIX_ETH0              36
  53 +#else
  54 +#define GPIO_GUMSTIX_ETH0_RST          107
  55 +#define GPIO_GUMSTIX_ETH0              99
  56 +#endif
  57  #define GPIO_GUMSTIX_ETH1_RST          52
  58 -#define GPIO_GUMSTIX_ETH1_RST_MD       (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
  59 +#define GPIO_GUMSTIX_ETH1              27
  60
  61 -#define GPIO_GUMSTIX_ETH0              36
  62 +#define GPIO_GUMSTIX_ETH0_RST_MD       (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
  63 +#define GPIO_GUMSTIX_ETH1_RST_MD       (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
  64  #define GPIO_GUMSTIX_ETH0_MD           (GPIO_GUMSTIX_ETH0 | GPIO_IN)
  65 -#define GUMSTIX_ETH0_IRQ               PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
  66 -#define GPIO_GUMSTIX_ETH1              27
  67  #define GPIO_GUMSTIX_ETH1_MD           (GPIO_GUMSTIX_ETH1 | GPIO_IN)
  68 -#define GUMSTIX_ETH1_IRQ               PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
  69 -
  70
  71 -/* CF reset line */
  72 -#define GPIO8_RESET                    8
  73 +#define GUMSTIX_ETH0_IRQ               PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
  74 +#define GUMSTIX_ETH1_IRQ               PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
  75
  76 -/* CF slot 0 */
  77 -#define GPIO4_nBVD1                    4
  78 -#define GPIO4_nSTSCHG                  GPIO4_nBVD1
  79 -#define GPIO11_nCD                     11
  80 -#define GPIO26_PRDY_nBSY               26
  81 -#define GUMSTIX_S0_nSTSCHG_IRQ         PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG)
  82 -#define GUMSTIX_S0_nCD_IRQ             PXA_GPIO_TO_IRQ(GPIO11_nCD)
  83 -#define GUMSTIX_S0_PRDY_nBSY_IRQ       PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)
  84 + /* CF reset line */
  85 +#define GPIO8_CF_RESET                 8
  86 +#define GPIO97_CF_RESET                        97
  87 +#define GPIO110_CF_RESET               110
  88 +
  89 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
  90 +#define GPIO_GUMSTIX_CF_RESET          GPIO8_CF_RESET
  91 +#else
  92 +#define GPIO_GUMSTIX_CF_RESET          GPIO97_CF_RESET
  93 +#endif
  94 +
  95 +#define GPIO_GUMSTIX_CF_OLD_RESET      GPIO110_CF_RESET
  96 +
  97 +/* CF signals shared by both sockets */
  98 +#define GPIO_GUMSTIX_nPOE      48
  99 +#define GPIO_GUMSTIX_nPWE      49
 100 +#define GPIO_GUMSTIX_nPIOR     50
 101 +#define GPIO_GUMSTIX_nPIOW     51
 102 +
 103 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
 104 +#define GPIO_GUMSTIX_nPCE_1    52
 105 +#define GPIO_GUMSTIX_nPCE_2    53
 106 +#define GPIO_GUMSTIX_pSKTSEL   54
 107 +#else
 108 +#define GPIO_GUMSTIX_nPCE_1    102
 109 +#define GPIO_GUMSTIX_nPCE_2    105
 110 +#define GPIO_GUMSTIX_pSKTSEL   79
 111 +#endif
 112 +
 113 +#define GPIO_GUMSTIX_nPREG     55
 114 +#define GPIO_GUMSTIX_nPWAIT    56
 115 +#define GPIO_GUMSTIX_nIOIS16   57
 116 +
 117 +/* Pin mode definitions correspond to mfp-pxa2[57]x.h */
 118 +#define GPIO_GUMSTIX_nPOE_MD   GPIO48_nPOE
 119 +#define GPIO_GUMSTIX_nPWE_MD   GPIO49_nPWE
 120 +#define GPIO_GUMSTIX_nPIOR_MD  GPIO50_nPIOR
 121 +#define GPIO_GUMSTIX_nPIOW_MD  GPIO51_nPIOW
 122 +
 123 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
 124 +#define GPIO_GUMSTIX_nPCE_1_MD GPIO52_nPCE_1
 125 +#define GPIO_GUMSTIX_nPCE_2_MD GPIO53_nPCE_2
 126 +#define GPIO_GUMSTIX_pSKTSEL_MD        GPIO54_pSKTSEL
 127 +#else
 128 +#define GPIO_GUMSTIX_nPCE_1_MD GPIO102_nPCE_1
 129 +#define GPIO_GUMSTIX_nPCE_2_MD GPIO105_nPCE_2
 130 +#define GPIO_GUMSTIX_pSKTSEL_MD        GPIO79_pSKTSEL
 131 +#endif
 132 +
 133 +#define GPIO_GUMSTIX_nPREG_MD  GPIO55_nPREG
 134 +#define GPIO_GUMSTIX_nPWAIT_MD GPIO56_nPWAIT
 135 +#define GPIO_GUMSTIX_nIOIS16_MD        GPIO57_nIOIS16
 136 +
 137 + /* CF slot 0 */
 138 +#define GPIO4_nBVD1_0                  4
 139 +#define GPIO4_nSTSCHG_0                        GPIO4_nBVD1_0
 140 +#define GPIO11_nCD_0                   11
 141 +#define GPIO26_PRDY_nBSY_0             26
 142 +
 143 +#define GPIO111_nBVD1_0                        111
 144 +#define GPIO111_nSTSCHG_0              GPIO111_nBVD1_0
 145 +#define GPIO104_nCD_0                  104
 146 +#define GPIO96_PRDY_nBSY_0             96
 147 +#define GPIO109_PRDY_nBSY_0            109
 148 +
 149 +#ifndef CONFIG_MACH_GUMSTIX_VERDEX
 150 +#define GPIO_GUMSTIX_nBVD1_0           GPIO4_nBVD1_0
 151 +#define GPIO_GUMSTIX_nSTSCHG_0         GPIO4_nSTSCHG_0
 152 +#define GPIO_GUMSTIX_nCD_0             GPIO11_nCD_0
 153 +#define GPIO_GUMSTIX_PRDY_nBSY_0       GPIO26_PRDY_nBSY_0
 154 +#else
 155 +#define GPIO_GUMSTIX_nBVD1_0           GPIO111_nBVD1_0
 156 +#define GPIO_GUMSTIX_nSTSCHG_0         GPIO111_nSTSCHG_0
 157 +#define GPIO_GUMSTIX_nCD_0             GPIO104_nCD_0
 158 +#define GPIO_GUMSTIX_PRDY_nBSY_0       GPIO96_PRDY_nBSY_0
 159 +#endif
 160 +
 161 +#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD   GPIO109_PRDY_nBSY_0
 162 +#define GUMSTIX_S0_PRDY_nBSY_OLD_IRQ   PXA_GPIO_TO_IRQ(GPIO109_PRDY_nBSY_0)
 163 +
 164 +#define GUMSTIX_S0_nSTSCHG_IRQ         PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_nSTSCHG_0)
 165 +#define GUMSTIX_S0_nCD_IRQ             PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_nCD_0)
 166 +#define GUMSTIX_S0_PRDY_nBSY_IRQ       PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_PRDY_nBSY_0)
 167
 168  /* CF slot 1 */
 169 -#define GPIO18_nBVD1                   18
 170 -#define GPIO18_nSTSCHG                 GPIO18_nBVD1
 171 -#define GPIO36_nCD                     36
 172 -#define GPIO27_PRDY_nBSY               27
 173 -#define GUMSTIX_S1_nSTSCHG_IRQ         PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG)
 174 -#define GUMSTIX_S1_nCD_IRQ             PXA_GPIO_TO_IRQ(GPIO36_nCD)
 175 -#define GUMSTIX_S1_PRDY_nBSY_IRQ       PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)
 176 -
 177 -/* CF GPIO line modes */
 178 -#define GPIO4_nSTSCHG_MD               (GPIO4_nSTSCHG | GPIO_IN)
 179 -#define GPIO8_RESET_MD                 (GPIO8_RESET | GPIO_OUT)
 180 -#define GPIO11_nCD_MD                  (GPIO11_nCD | GPIO_IN)
 181 -#define GPIO18_nSTSCHG_MD              (GPIO18_nSTSCHG | GPIO_IN)
 182 -#define GPIO26_PRDY_nBSY_MD            (GPIO26_PRDY_nBSY | GPIO_IN)
 183 -#define GPIO27_PRDY_nBSY_MD            (GPIO27_PRDY_nBSY | GPIO_IN)
 184 -#define GPIO36_nCD_MD                  (GPIO36_nCD | GPIO_IN)
 185 +#define GPIO18_nBVD1_1                 18
 186 +#define GPIO18_nSTSCHG_1               GPIO18_nBVD1_1
 187 +#define GPIO36_nCD_1                   36
 188 +#define GPIO27_PRDY_nBSY_1             27
 189 +
 190 +#define GPIO_GUMSTIX_nBVD1_1           GPIO18_nBVD1_1
 191 +#define GPIO_GUMSTIX_nSTSCHG_1         GPIO18_nSTSCHG_1
 192 +#define GPIO_GUMSTIX_nCD_1             GPIO36_nCD_1
 193 +#define GPIO_GUMSTIX_PRDY_nBSY_1       GPIO27_PRDY_nBSY_1
 194 +
 195 +#define GUMSTIX_S1_nSTSCHG_IRQ         PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG_1)
 196 +#define GUMSTIX_S1_nCD_IRQ             PXA_GPIO_TO_IRQ(GPIO36_nCD_1)
 197 +#define GUMSTIX_S1_PRDY_nBSY_IRQ       PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY_1)
 198 +
 199 +/* CF GPIO line modes - correspond to mfp-pxa2[57]x.h */
 200 +#define GPIO_GUMSTIX_CF_RESET_MD       (GPIO_GUMSTIX_CF_RESET | GPIO_OUT)
 201 +#define GPIO_GUMSTIX_CF_OLD_RESET_MD   (GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT)
 202 +
 203 +#define GPIO_GUMSTIX_nSTSCHG_0_MD      GPIO111_GPIO
 204 +#define GPIO_GUMSTIX_nCD_0_MD          GPIO104_GPIO
 205 +
 206 +#define GPIO_GUMSTIX_PRDY_nBSY_0_MD    GPIO96_GPIO
 207 +#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD        GPIO109_GPIO
 208 +
 209 +#define GPIO_GUMSTIX_nSTSCHG_1_MD      GPIO18_GPIO
 210 +#define GPIO_GUMSTIX_nCD_1_MD          GPIO36_GPIO
 211 +#define GPIO_GUMSTIX_PRDY_nBSY_1_MD    GPIO27_GPIO
 212
 213  /* for expansion boards that can't be programatically detected */
 214  extern int am200_init(void);