treewide: fix some cosmetic glitches in dts files
[openwrt/openwrt.git] / target / linux / ramips / dts / ArcherMR200.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "tplink,mr200", "ralink,mt7620a-soc";
10 model = "TP-Link Archer MR200";
11
12 aliases {
13 led-status = &led_power;
14 };
15
16 chosen {
17 bootargs = "console=ttyS0,115200";
18 };
19
20 gpio-leds {
21 compatible = "gpio-leds";
22
23 lan {
24 label = "mr200:white:lan";
25 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
26 };
27
28 wan {
29 label = "mr200:white:wan";
30 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
31 };
32
33 led_power: power {
34 label = "mr200:white:power";
35 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
36 };
37
38 4g {
39 label = "mr200:white:4g";
40 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
41 };
42
43 wps {
44 label = "mr200:white:wps";
45 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
46 };
47
48 signal1 {
49 label = "mr200:white:signal1";
50 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
51 };
52
53 signal2 {
54 label = "mr200:white:signal2";
55 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
56 };
57
58 signal3 {
59 label = "mr200:white:signal3";
60 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
61 };
62
63 signal4 {
64 label = "mr200:white:signal4";
65 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
66 };
67
68 wlan {
69 label = "mr200:white:wlan";
70 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
71 };
72 };
73
74 gpio-keys {
75 compatible = "gpio-keys";
76
77 reset {
78 label = "reset";
79 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
80 linux,code = <KEY_RESTART>;
81 };
82
83 rfkill {
84 label = "rfkill";
85 gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
86 linux,code = <KEY_RFKILL>;
87 };
88 };
89
90 gpio_export {
91 compatible = "gpio-export";
92 #size-cells = <0>;
93
94 power_usb {
95 gpio-export,name = "power_usb1";
96 gpio-export,output = <1>;
97 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
98 };
99 };
100 };
101
102 &gpio1 {
103 status = "okay";
104 };
105
106 &gpio2 {
107 status = "okay";
108 };
109
110 &gpio3 {
111 status = "okay";
112 };
113
114 &spi0 {
115 status = "okay";
116
117 m25p80@0 {
118 compatible = "jedec,spi-nor";
119 reg = <0>;
120 spi-max-frequency = <10000000>;
121
122 partitions {
123 compatible = "fixed-partitions";
124 #address-cells = <1>;
125 #size-cells = <1>;
126
127 partition@0 {
128 label = "u-boot";
129 reg = <0x0 0x20000>;
130 read-only;
131 };
132
133 partition@20000 {
134 label = "firmware";
135 reg = <0x20000 0x7b0000>;
136 };
137
138 rom: partition@7d0000 {
139 label = "rom";
140 reg = <0x7d0000 0x10000>;
141 read-only;
142 };
143
144 partition@7e0000 {
145 label = "romfile";
146 reg = <0x7e0000 0x10000>;
147 read-only;
148 };
149
150 radio: partition@7f0000 {
151 label = "radio";
152 reg = <0x7f0000 0x10000>;
153 read-only;
154 };
155 };
156 };
157 };
158
159 &pinctrl {
160 state_default: pinctrl0 {
161 gpio {
162 ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
163 ralink,function = "gpio";
164 };
165 };
166 };
167
168 &ethernet {
169 mtd-mac-address = <&rom 0xf100>;
170 mediatek,portmap = "llll";
171 };
172
173 &ehci {
174 status = "okay";
175 };
176
177 &ohci {
178 status = "okay";
179 };
180
181 &gsw {
182 mediatek,port4 = "ephy";
183 };
184
185 &wmac {
186 ralink,mtd-eeprom = <&radio 0>;
187 };
188
189 &pcie {
190 status = "okay";
191 };
192
193 &pcie0 {
194 mt76@0,0 {
195 reg = <0x0000 0 0 0 0>;
196 mediatek,mtd-eeprom = <&radio 32768>;
197 };
198 };