ramips: set rt2880 pci controller of_node
[openwrt/openwrt.git] / target / linux / ramips / dts / CS-QR10.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "planex,cs-qr10", "ralink,mt7620a-soc";
10 model = "Planex CS-QR10";
11
12 aliases {
13 led-status = &led_power;
14 };
15
16 gpio-leds {
17 compatible = "gpio-leds";
18
19 led_power: power {
20 label = "cs-qr10:red:power";
21 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
22 };
23 };
24
25 gpio-keys-polled {
26 compatible = "gpio-keys-polled";
27 poll-interval = <20>;
28
29 s1 {
30 label = "reset";
31 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_RESTART>;
33 };
34
35 s2 {
36 label = "wps";
37 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
38 linux,code = <KEY_WPS_BUTTON>;
39 };
40 };
41 };
42
43 &gpio0 {
44 status = "okay";
45 };
46
47 &gpio1 {
48 status = "okay";
49 };
50
51 &gpio2 {
52 status = "okay";
53 };
54
55 &gpio3 {
56 status = "okay";
57 };
58
59 &i2c {
60 status = "okay";
61 };
62
63 &i2s {
64 status = "okay";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pcm_i2s_pins>;
67 };
68
69 &spi0 {
70 status = "okay";
71
72 m25p80@0 {
73 compatible = "jedec,spi-nor";
74 reg = <0>;
75 spi-max-frequency = <10000000>;
76
77 partitions {
78 compatible = "fixed-partitions";
79 #address-cells = <1>;
80 #size-cells = <1>;
81
82 partition@0 {
83 label = "u-boot";
84 reg = <0x0 0x30000>;
85 read-only;
86 };
87
88 partition@30000 {
89 label = "u-boot-env";
90 reg = <0x30000 0x10000>;
91 read-only;
92 };
93
94 factory: partition@40000 {
95 label = "factory";
96 reg = <0x40000 0x10000>;
97 read-only;
98 };
99
100 partition@50000 {
101 label = "firmware";
102 reg = <0x50000 0x7b0000>;
103 };
104 };
105 };
106 };
107
108 &pcm {
109 status = "okay";
110 };
111
112 &gdma {
113 status = "okay";
114 };
115
116 &pinctrl {
117 state_default: pinctrl0 {
118 gpio {
119 ralink,group = "spi refclk", "rgmii1";
120 ralink,function = "gpio";
121 };
122 wdt {
123 ralink,group = "wdt";
124 ralink,function = "wdt refclk";
125 };
126 };
127 };
128
129 &ethernet {
130 pinctrl-names = "default";
131 pinctrl-0 = <&ephy_pins>;
132 mtd-mac-address = <&factory 0x4>;
133 mediatek,portmap = "llllw";
134 };
135
136 &gsw {
137 ralink,port4 = "ephy";
138 };
139
140 &sdhci {
141 status = "okay";
142 };
143
144 &ehci {
145 status = "okay";
146 };
147
148 &ohci {
149 status = "okay";
150 };
151
152 &wmac {
153 ralink,mtd-eeprom = <&factory 0>;
154 };
155
156 &pcie {
157 status = "okay";
158 };