ramips: set rt2880 pci controller of_node
[openwrt/openwrt.git] / target / linux / ramips / dts / K2G.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "phicomm,k2g", "ralink,mt7620a-soc";
10 model = "Phicomm K2G";
11
12 aliases {
13 led-status = &led_blue;
14 serial0 = &uartlite;
15 };
16
17 gpio-leds {
18 compatible = "gpio-leds";
19
20 led_blue: blue {
21 label = "k2g:blue:status";
22 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
23 };
24
25 yellow {
26 label = "k2g:yellow:status";
27 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
28 };
29
30 red {
31 label = "k2g:red:status";
32 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
33 };
34 };
35
36 gpio-keys-polled {
37 compatible = "gpio-keys-polled";
38 poll-interval = <20>;
39
40 reset {
41 label = "reset";
42 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
43 linux,code = <KEY_RESTART>;
44 };
45 };
46 };
47
48 &spi0 {
49 status = "okay";
50
51 m25p80@0 {
52 compatible = "jedec,spi-nor";
53 reg = <0>;
54 spi-max-frequency = <24000000>;
55
56 partitions {
57 compatible = "fixed-partitions";
58 #address-cells = <1>;
59 #size-cells = <1>;
60
61 partition@0 {
62 reg = <0x0 0x30000>;
63 label = "u-boot";
64 read-only;
65 };
66
67 partition@30000 {
68 reg = <0x30000 0x10000>;
69 label = "u-boot-env";
70 read-only;
71 };
72
73 factory: partition@40000 {
74 reg = <0x40000 0x10000>;
75 label = "factory";
76 read-only;
77 };
78
79 partition@50000 {
80 reg = <0x50000 0x50000>;
81 label = "permanent_config";
82 read-only;
83 };
84
85 partition@a0000 {
86 reg = <0xa0000 0x760000>;
87 label = "firmware";
88 };
89 };
90 };
91 };
92
93 &pinctrl {
94 state_default: pinctrl0 {
95 gpio {
96 ralink,group = "i2c", "uartf";
97 ralink,function = "gpio";
98 };
99 };
100 };
101
102 &ethernet {
103 pinctrl-names = "default";
104 pinctrl-0 = <&rgmii2_pins &mdio_pins>;
105 mtd-mac-address = <&factory 0x28>;
106 mediatek,portmap = "llllw";
107
108 port@5 {
109 status = "okay";
110 phy-handle = <&phy5>;
111 phy-mode = "rgmii";
112 };
113
114 mdio-bus {
115 status = "okay";
116
117 phy5: ethernet-phy@5 {
118 reg = <5>;
119 phy-mode = "rgmii";
120 };
121 };
122 };
123
124 &pcie {
125 status = "okay";
126 };
127
128 &pcie0 {
129 mt76@0,0 {
130 reg = <0x0000 0 0 0 0>;
131 mediatek,mtd-eeprom = <&factory 0x8000>;
132 ieee80211-freq-limit = <5000000 6000000>;
133 };
134 };
135
136 &wmac {
137 ralink,mtd-eeprom = <&factory 0>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&pa_pins>;
140 };