fadb484f3904fdff4abce0c8d4ba2e779004c38e
[openwrt/openwrt.git] / target / linux / ramips / dts / NA930.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "sercomm,na930", "ralink,mt7620a-soc";
10 model = "Sercomm NA930";
11
12 aliases {
13 led-status = &led_power;
14 };
15
16 chosen {
17 bootargs = "console=ttyS1,57600";
18 };
19
20 nand {
21 compatible = "mtk,mt7620-nand";
22
23 partitions {
24 compatible = "fixed-partitions";
25 #address-cells = <1>;
26 #size-cells = <1>;
27
28 partition@0 {
29 label = "u-boot";
30 reg = <0x0 0x20000>;
31 read-only;
32 };
33
34 partition@200000 {
35 label = "factory";
36 reg = <0x200000 0x40000>;
37 read-only;
38 };
39
40 partition@240000 {
41 label = "Config";
42 reg = <0x240000 0x400000>;
43 read-only;
44 };
45
46 partition@640000 {
47 label = "firmware";
48 reg = <0x640000 0x1400000>;
49 };
50 };
51 };
52
53 gpio-keys-polled {
54 compatible = "gpio-keys-polled";
55 poll-interval = <20>;
56
57 reset {
58 label = "reset";
59 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
60 linux,code = <KEY_RESTART>;
61 };
62
63 zwave {
64 label = "zwave";
65 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
66 linux,code = <BTN_0>;
67 };
68
69 wps {
70 label = "wps";
71 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
72 linux,code = <KEY_WPS_BUTTON>;
73 };
74 };
75
76 gpio-leds {
77 compatible = "gpio-leds";
78
79 zwave {
80 label = "na930:blue:zwave";
81 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
82 };
83
84 status {
85 label = "na930:blue:status";
86 gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
87 };
88
89 service {
90 label = "na930:blue:service";
91 gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
92 };
93
94 led_power: power {
95 label = "na930:blue:power";
96 gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
97 };
98 };
99
100 gpio_export {
101 compatible = "gpio-export";
102 #size-cells = <0>;
103
104 telit {
105 gpio-export,name = "telit";
106 gpio-export,output = <1>;
107 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
108 };
109 };
110 };
111
112 &pinctrl {
113 state_default: pinctrl0 {
114 gpio {
115 ralink,group = "i2c", "rgmii2", "spi", "ephy";
116 ralink,function = "gpio";
117 };
118
119 uartf_gpio {
120 ralink,group = "uartf";
121 ralink,function = "gpio uartf";
122 };
123 };
124 };
125
126 &uart {
127 status = "okay";
128 };
129
130 &gpio1 {
131 status = "okay";
132 };
133
134 &gpio2 {
135 status = "okay";
136 };
137
138 &ethernet {
139 status = "okay";
140 pinctrl-names = "default";
141 pinctrl-0 = <&rgmii1_pins &mdio_pins>;
142 mediatek,portmap = "llllw";
143
144 port@4 {
145 status = "okay";
146 phy-handle = <&phy4>;
147 phy-mode = "rgmii";
148 };
149
150 port@5 {
151 status = "okay";
152 phy-handle = <&phy5>;
153 phy-mode = "rgmii";
154 };
155
156 mdio-bus {
157 status = "okay";
158
159 phy4: ethernet-phy@4 {
160 reg = <4>;
161 phy-mode = "rgmii";
162 };
163
164 phy5: ethernet-phy@5 {
165 reg = <5>;
166 phy-mode = "rgmii";
167 };
168 };
169 };
170
171 &gsw {
172 mediatek,port4 = "gmac";
173 };
174
175 &ehci {
176 status = "okay";
177 };
178
179 &ohci {
180 status = "okay";
181 };