ramips: fix dtc warnings
[openwrt/openwrt.git] / target / linux / ramips / dts / WL-351.dts
1 /dts-v1/;
2
3 #include "rt3050.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "sitecom,wl-351", "ralink,rt3052-soc";
10 model = "Sitecom WL-351 v1 002";
11
12 aliases {
13 led-status = &led_power;
14 };
15
16 cfi@1f000000 {
17 compatible = "cfi-flash";
18 reg = <0x1f000000 0x800000>;
19 bank-width = <2>;
20 device-width = <2>;
21 #address-cells = <1>;
22 #size-cells = <1>;
23
24 partition@0 {
25 label = "u-boot";
26 reg = <0x0 0x30000>;
27 read-only;
28 };
29
30 partition@30000 {
31 label = "u-boot-env";
32 reg = <0x30000 0x10000>;
33 read-only;
34 };
35
36 factory: partition@40000 {
37 label = "factory";
38 reg = <0x40000 0x10000>;
39 read-only;
40 };
41
42 partition@50000 {
43 label = "firmware";
44 reg = <0x50000 0x3b0000>;
45 };
46 };
47
48 gpio-leds {
49 compatible = "gpio-leds";
50
51 led_power: power {
52 label = "wl-351:amber:power";
53 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
54 };
55
56 unpopulated {
57 label = "wl-351:amber:unpopulated";
58 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
59 };
60
61 unpopulated2 {
62 label = "wl-351:blue:unpopulated";
63 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
64 };
65 };
66
67 gpio-keys-polled {
68 compatible = "gpio-keys-polled";
69 poll-interval = <20>;
70
71 reset {
72 label = "reset";
73 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
74 linux,code = <KEY_RESTART>;
75 };
76
77 wps {
78 label = "wps";
79 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
80 linux,code = <KEY_WPS_BUTTON>;
81 };
82 };
83
84 rtl8366rb {
85 compatible = "realtek,rtl8366rb";
86 gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
87 gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
88 };
89 };
90
91 &pinctrl {
92 state_default: pinctrl0 {
93 gpio {
94 ralink,group = "spi", "i2c", "jtag", "mdio", "uartf";
95 ralink,function = "gpio";
96 };
97 };
98 };
99
100 &ethernet {
101 mtd-mac-address = <&factory 0x4>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&rgmii_pins>;
104 };
105
106 &esw {
107 ralink,rgmii = <1>;
108 mediatek,portmap = <0x3f>;
109 ralink,fct2 = <0x0002500c>;
110 /*
111 * ext phy base addr 31, rx/tx clock skew 0,
112 * turbo mii off, rgmi 3.3v off, port 5 polling off
113 * port5: enabled, gige, full-duplex, rx/tx-flow-control
114 * port6: enabled, gige, full-duplex, rx/tx-flow-control
115 */
116 ralink,fpa2 = <0x1f003fff>;
117 };
118
119 &wmac {
120 ralink,mtd-eeprom = <&factory 0>;
121 };
122
123 &otg {
124 status = "okay";
125 };