target/linux/ramips/dts/mt7620a.dtsi

   1 /dts-v1/;
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         compatible = "ralink,mt7620a-soc";
   7
   8         aliases {
   9                 spi0 = &spi0;
  10                 spi1 = &spi1;
  11                 serial0 = &uartlite;
  12         };
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 cpu@0 {
  19                         compatible = "mips,mips24KEc";
  20                         reg = <0>;
  21                 };
  22         };
  23
  24         chosen {
  25                 bootargs = "console=ttyS0,57600";
  26         };
  27
  28         cpuintc: cpuintc {
  29                 #address-cells = <0>;
  30                 #interrupt-cells = <1>;
  31                 interrupt-controller;
  32                 compatible = "mti,cpu-interrupt-controller";
  33         };
  34
  35         palmbus: palmbus@10000000 {
  36                 compatible = "palmbus";
  37                 reg = <0x10000000 0x200000>;
  38                 ranges = <0x0 0x10000000 0x1FFFFF>;
  39
  40                 #address-cells = <1>;
  41                 #size-cells = <1>;
  42
  43                 sysc: syscon@0 {
  44                         compatible = "ralink,mt7620-sysc", "syscon";
  45                         reg = <0x0 0x100>;
  46                         #clock-cells = <1>;
  47                         #reset-cells = <1>;
  48                 };
  49
  50                 timer: timer@100 {
  51                         compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
  52                         reg = <0x100 0x20>;
  53
  54                         clocks = <&sysc 5>;
  55
  56                         interrupt-parent = <&intc>;
  57                         interrupts = <1>;
  58                 };
  59
  60                 watchdog: watchdog@120 {
  61                         compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
  62                         reg = <0x120 0x10>;
  63
  64                         clocks = <&sysc 6>;
  65
  66                         resets = <&sysc 8>;
  67                         reset-names = "wdt";
  68
  69                         interrupt-parent = <&intc>;
  70                         interrupts = <1>;
  71                 };
  72
  73                 intc: intc@200 {
  74                         compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
  75                         reg = <0x200 0x100>;
  76
  77                         interrupt-controller;
  78                         #interrupt-cells = <1>;
  79
  80                         interrupt-parent = <&cpuintc>;
  81                         interrupts = <2>;
  82                 };
  83
  84                 memc: memc@300 {
  85                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  86                         reg = <0x300 0x100>;
  87
  88                         interrupt-parent = <&intc>;
  89                         interrupts = <3>;
  90                 };
  91
  92                 uart: uart@500 {
  93                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
  94                         reg = <0x500 0x100>;
  95
  96                         clocks = <&sysc 7>;
  97
  98                         resets = <&sysc 12>;
  99
 100                         interrupt-parent = <&intc>;
 101                         interrupts = <5>;
 102
 103                         reg-shift = <2>;
 104
 105                         status = "disabled";
 106                 };
 107
 108                 gpio0: gpio@600 {
 109                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 110                         reg = <0x600 0x34>;
 111
 112                         interrupt-parent = <&intc>;
 113                         interrupts = <6>;
 114
 115                         gpio-controller;
 116                         #gpio-cells = <2>;
 117
 118                         ngpios = <24>;
 119                         ralink,gpio-base = <0>;
 120                         ralink,register-map = [ 00 04 08 0c
 121                                                 20 24 28 2c
 122                                                 30 34 ];
 123                 };
 124
 125                 gpio1: gpio@638 {
 126                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 127                         reg = <0x638 0x24>;
 128
 129                         interrupt-parent = <&intc>;
 130                         interrupts = <6>;
 131
 132                         gpio-controller;
 133                         #gpio-cells = <2>;
 134
 135                         ngpios = <16>;
 136                         ralink,gpio-base = <24>;
 137                         ralink,register-map = [ 00 04 08 0c
 138                                                 10 14 18 1c
 139                                                 20 24 ];
 140
 141                         status = "disabled";
 142                 };
 143
 144                 gpio2: gpio@660 {
 145                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 146                         reg = <0x660 0x24>;
 147
 148                         interrupt-parent = <&intc>;
 149                         interrupts = <6>;
 150
 151                         gpio-controller;
 152                         #gpio-cells = <2>;
 153
 154                         ngpios = <32>;
 155                         ralink,gpio-base = <40>;
 156                         ralink,register-map = [ 00 04 08 0c
 157                                                 10 14 18 1c
 158                                                 20 24 ];
 159
 160                         status = "disabled";
 161                 };
 162
 163                 gpio3: gpio@688 {
 164                         compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
 165                         reg = <0x688 0x24>;
 166
 167                         interrupt-parent = <&intc>;
 168                         interrupts = <6>;
 169
 170                         gpio-controller;
 171                         #gpio-cells = <2>;
 172
 173                         ngpios = <1>;
 174                         ralink,gpio-base = <72>;
 175                         ralink,register-map = [ 00 04 08 0c
 176                                                 10 14 18 1c
 177                                                 20 24 ];
 178
 179                         status = "disabled";
 180                 };
 181
 182                 i2c: i2c@900 {
 183                         compatible = "ralink,rt2880-i2c";
 184                         reg = <0x900 0x100>;
 185
 186                         clocks = <&sysc 8>;
 187
 188                         resets = <&sysc 16>;
 189                         reset-names = "i2c";
 190
 191                         #address-cells = <1>;
 192                         #size-cells = <0>;
 193
 194                         status = "disabled";
 195
 196                         pinctrl-names = "default";
 197                         pinctrl-0 = <&i2c_pins>;
 198                 };
 199
 200                 i2s: i2s@a00 {
 201                         compatible = "mediatek,mt7620-i2s";
 202                         reg = <0xa00 0x100>;
 203
 204                         clocks = <&sysc 9>;
 205
 206                         resets = <&sysc 17>;
 207                         reset-names = "i2s";
 208
 209                         interrupt-parent = <&intc>;
 210                         interrupts = <10>;
 211
 212                         txdma-req = <2>;
 213                         rxdma-req = <3>;
 214
 215                         dmas = <&gdma 4>,
 216                                 <&gdma 6>;
 217                         dma-names = "tx", "rx";
 218
 219                         status = "disabled";
 220                 };
 221
 222                 spi0: spi@b00 {
 223                         compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
 224                         reg = <0xb00 0x40>;
 225
 226                         clocks = <&sysc 10>;
 227
 228                         resets = <&sysc 18>;
 229                         reset-names = "spi";
 230
 231                         #address-cells = <1>;
 232                         #size-cells = <0>;
 233
 234                         status = "disabled";
 235
 236                         pinctrl-names = "default";
 237                         pinctrl-0 = <&spi_pins>;
 238                 };
 239
 240                 spi1: spi@b40 {
 241                         compatible = "ralink,rt2880-spi";
 242                         reg = <0xb40 0x60>;
 243
 244                         clocks = <&sysc 11>;
 245
 246                         resets = <&sysc 18>;
 247                         reset-names = "spi";
 248
 249                         #address-cells = <1>;
 250                         #size-cells = <0>;
 251
 252                         status = "disabled";
 253
 254                         pinctrl-names = "default";
 255                         pinctrl-0 = <&spi_cs1>;
 256                 };
 257
 258                 uartlite: uartlite@c00 {
 259                         compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
 260                         reg = <0xc00 0x100>;
 261
 262                         clocks = <&sysc 12>;
 263
 264                         resets = <&sysc 19>;
 265
 266                         interrupt-parent = <&intc>;
 267                         interrupts = <12>;
 268
 269                         reg-shift = <2>;
 270
 271                         pinctrl-names = "default";
 272                         pinctrl-0 = <&uartlite_pins>;
 273                 };
 274
 275                 systick: systick@d00 {
 276                         compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
 277                         reg = <0xd00 0x10>;
 278
 279                         interrupt-parent = <&cpuintc>;
 280                         interrupts = <7>;
 281                 };
 282
 283                 pcm: pcm@2000 {
 284                         compatible = "ralink,mt7620a-pcm";
 285                         reg = <0x2000 0x800>;
 286
 287                         resets = <&sysc 11>;
 288                         reset-names = "pcm";
 289
 290                         interrupt-parent = <&intc>;
 291                         interrupts = <4>;
 292
 293                         status = "disabled";
 294                 };
 295
 296                 gdma: gdma@2800 {
 297                         compatible = "ralink,mt7620a-gdma", "ralink,rt3883-gdma";
 298                         reg = <0x2800 0x800>;
 299
 300                         resets = <&sysc 14>;
 301                         reset-names = "dma";
 302
 303                         interrupt-parent = <&intc>;
 304                         interrupts = <7>;
 305
 306                         #dma-cells = <1>;
 307                         #dma-channels = <16>;
 308                         #dma-requests = <16>;
 309
 310                         status = "disabled";
 311                 };
 312         };
 313
 314         pinctrl: pinctrl {
 315                 compatible = "ralink,rt2880-pinmux";
 316                 pinctrl-names = "default";
 317                 pinctrl-0 = <&state_default>;
 318
 319                 state_default: pinctrl0 {
 320                 };
 321
 322                 pcm_i2s_pins: pcm_i2s {
 323                         pcm_i2s {
 324                                 groups = "uartf";
 325                                 function = "pcm i2s";
 326                         };
 327                 };
 328
 329                 uartf_gpio_pins: uartf_gpio {
 330                         uartf_gpio {
 331                                 groups = "uartf";
 332                                 function = "gpio uartf";
 333                         };
 334                 };
 335
 336                 gpio_i2s_pins: gpio_i2s {
 337                         gpio_i2s {
 338                                 groups = "uartf";
 339                                 function = "gpio i2s";
 340                         };
 341                 };
 342
 343                 spi_pins: spi_pins {
 344                         spi_pins {
 345                                 groups = "spi";
 346                                 function = "spi";
 347                         };
 348                 };
 349
 350                 spi_cs1: spi1 {
 351                         spi1 {
 352                                 groups = "spi refclk";
 353                                 function = "spi refclk";
 354                         };
 355                 };
 356
 357                 i2c_pins: i2c_pins {
 358                         i2c_pins {
 359                                 groups = "i2c";
 360                                 function = "i2c";
 361                         };
 362                 };
 363
 364                 uartlite_pins: uartlite {
 365                         uart {
 366                                 groups = "uartlite";
 367                                 function = "uartlite";
 368                         };
 369                 };
 370
 371                 mdio_pins: mdio {
 372                         mdio {
 373                                 groups = "mdio";
 374                                 function = "mdio";
 375                         };
 376                 };
 377
 378                 mdio_refclk_pins: mdio_refclk {
 379                         mdio_refclk {
 380                                 groups = "mdio";
 381                                 function = "refclk";
 382                         };
 383                 };
 384
 385                 ephy_pins: ephy {
 386                         ephy {
 387                                 groups = "ephy";
 388                                 function = "ephy";
 389                         };
 390                 };
 391
 392                 wled_pins: wled {
 393                         wled {
 394                                 groups = "wled";
 395                                 function = "wled";
 396                         };
 397                 };
 398
 399                 rgmii1_pins: rgmii1 {
 400                         rgmii1 {
 401                                 groups = "rgmii1";
 402                                 function = "rgmii1";
 403                         };
 404                 };
 405
 406                 rgmii2_pins: rgmii2 {
 407                         rgmii2 {
 408                                 groups = "rgmii2";
 409                                 function = "rgmii2";
 410                         };
 411                 };
 412
 413                 pcie_pins: pcie {
 414                         pcie {
 415                                 groups = "pcie";
 416                                 function = "pcie rst";
 417                         };
 418                 };
 419
 420                 pa_pins: pa {
 421                         pa {
 422                                 groups = "pa";
 423                                 function = "pa";
 424                         };
 425                 };
 426
 427                 pa_gpio_pins: pa_gpio {
 428                         pa {
 429                                 groups = "pa";
 430                                 function = "gpio";
 431                         };
 432                 };
 433
 434                 sdhci_pins: sdhci {
 435                         sdhci {
 436                                 groups = "nd_sd";
 437                                 function = "sd";
 438                         };
 439                 };
 440         };
 441
 442         usbphy: usbphy {
 443                 compatible = "mediatek,mt7620-usbphy";
 444                 #phy-cells = <0>;
 445
 446                 ralink,sysctl = <&sysc>;
 447                 /* usb phy reset is only controled by RSTCTRL bit 25 */
 448                 resets = <&sysc 25>, <&sysc 22>;
 449                 reset-names = "host", "device";
 450         };
 451
 452         ethernet: ethernet@10100000 {
 453                 compatible = "mediatek,mt7620-eth";
 454                 reg = <0x10100000 0x10000>;
 455
 456                 #address-cells = <1>;
 457                 #size-cells = <0>;
 458
 459                 interrupt-parent = <&cpuintc>;
 460                 interrupts = <5>;
 461
 462                 resets = <&sysc 21>, <&sysc 23>;
 463                 reset-names = "fe", "esw";
 464
 465                 mediatek,switch = <&gsw>;
 466
 467                 port@4 {
 468                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 469                         reg = <4>;
 470
 471                         status = "disabled";
 472                 };
 473
 474                 port@5 {
 475                         compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port";
 476                         reg = <5>;
 477
 478                         status = "disabled";
 479                 };
 480
 481                 mdio-bus {
 482                         #address-cells = <1>;
 483                         #size-cells = <0>;
 484
 485                         status = "disabled";
 486                 };
 487         };
 488
 489         gsw: gsw@10110000 {
 490                 compatible = "mediatek,mt7620-gsw";
 491                 reg = <0x10110000 0x8000>;
 492
 493                 resets = <&sysc 24>;
 494                 reset-names = "ephy";
 495
 496                 interrupt-parent = <&intc>;
 497                 interrupts = <17>;
 498         };
 499
 500         sdhci: sdhci@10130000 {
 501                 compatible = "ralink,mt7620-sdhci";
 502                 reg = <0x10130000 0x4000>;
 503
 504                 interrupt-parent = <&intc>;
 505                 interrupts = <14>;
 506
 507                 pinctrl-names = "default";
 508                 pinctrl-0 = <&sdhci_pins>;
 509
 510                 status = "disabled";
 511         };
 512
 513         ehci: ehci@101c0000 {
 514                 #address-cells = <1>;
 515                 #size-cells = <0>;
 516                 compatible = "generic-ehci";
 517                 reg = <0x101c0000 0x1000>;
 518
 519                 interrupt-parent = <&intc>;
 520                 interrupts = <18>;
 521
 522                 phys = <&usbphy>;
 523                 phy-names = "usb";
 524
 525                 status = "disabled";
 526
 527                 ehci_port1: port@1 {
 528                         reg = <1>;
 529                         #trigger-source-cells = <0>;
 530                 };
 531         };
 532
 533         ohci: ohci@101c1000 {
 534                 #address-cells = <1>;
 535                 #size-cells = <0>;
 536                 compatible = "generic-ohci";
 537                 reg = <0x101c1000 0x1000>;
 538
 539                 interrupt-parent = <&intc>;
 540                 interrupts = <18>;
 541
 542                 phys = <&usbphy>;
 543                 phy-names = "usb";
 544
 545                 status = "disabled";
 546
 547                 ohci_port1: port@1 {
 548                         reg = <1>;
 549                         #trigger-source-cells = <0>;
 550                 };
 551         };
 552
 553         pcie: pcie@10140000 {
 554                 compatible = "mediatek,mt7620-pci";
 555                 reg = <0x10140000 0x100
 556                         0x10142000 0x100>;
 557
 558                 #address-cells = <3>;
 559                 #size-cells = <2>;
 560
 561                 resets = <&sysc 26>;
 562                 reset-names = "pcie0";
 563
 564                 interrupt-parent = <&cpuintc>;
 565                 interrupts = <4>;
 566
 567                 pinctrl-names = "default";
 568                 pinctrl-0 = <&pcie_pins>;
 569
 570                 device_type = "pci";
 571
 572                 bus-range = <0 255>;
 573                 ranges = <
 574                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 575                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 576                 >;
 577
 578                 status = "disabled";
 579
 580                 pcie0: pcie@0,0 {
 581                         reg = <0x0000 0 0 0 0>;
 582
 583                         #address-cells = <3>;
 584                         #size-cells = <2>;
 585
 586                         device_type = "pci";
 587
 588                         ranges;
 589                 };
 590         };
 591
 592         wmac: wmac@10180000 {
 593                 compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
 594                 reg = <0x10180000 0x40000>;
 595
 596                 clocks = <&sysc 13>;
 597
 598                 interrupt-parent = <&cpuintc>;
 599                 interrupts = <6>;
 600
 601                 ralink,eeprom = "soc_wmac.eeprom";
 602         };
 603 };