target/linux/ramips/dts/mt7620a_dlink_dwr-118-a1.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/mtd/partitions/uimage.h>
   8
   9 / {
  10         compatible = "dlink,dwr-118-a1", "ralink,mt7620a-soc";
  11         model = "D-Link DWR-118 A1";
  12
  13         aliases {
  14                 led-boot = &led_internet;
  15                 led-failsafe = &led_internet;
  16                 led-upgrade = &led_internet;
  17         };
  18
  19         keys {
  20                 compatible = "gpio-keys";
  21
  22                 wps {
  23                         label = "wps";
  24                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  25                         linux,code = <KEY_WPS_BUTTON>;
  26                 };
  27
  28                 reset {
  29                         label = "reset";
  30                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  31                         linux,code = <KEY_RESTART>;
  32                 };
  33         };
  34
  35         leds {
  36                 compatible = "gpio-leds";
  37
  38                 wan {
  39                         label = "green:wan";
  40                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  41                 };
  42
  43                 led_internet: internet {
  44                         label = "green:internet";
  45                         gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
  46                 };
  47
  48                 lan {
  49                         label = "green:lan";
  50                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  51                 };
  52
  53                 wlan2g {
  54                         label = "green:wlan2g";
  55                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  56                 };
  57
  58                 usb {
  59                         label = "green:usb";
  60                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  61                         trigger-sources = <&ohci_port1>, <&ehci_port1>;
  62                         linux,default-trigger = "usbport";
  63                 };
  64         };
  65
  66         gpio_export {
  67                 compatible = "gpio-export";
  68                 #size-cells = <0>;
  69
  70                 usb {
  71                         gpio-export,name = "usb";
  72                         gpio-export,output = <0>;
  73                         gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
  74                 };
  75         };
  76 };
  77
  78 &gpio1 {
  79         status = "okay";
  80 };
  81
  82 &gpio2 {
  83         status = "okay";
  84 };
  85
  86 &gpio3 {
  87         status = "okay";
  88 };
  89
  90 &spi0 {
  91         status = "okay";
  92
  93         flash@0 {
  94                 compatible = "jedec,spi-nor";
  95                 reg = <0>;
  96                 spi-max-frequency = <80000000>;
  97
  98                 partitions {
  99                         compatible = "fixed-partitions";
 100                         #address-cells = <1>;
 101                         #size-cells = <1>;
 102
 103                         partition@0 {
 104                                 label = "jboot";
 105                                 reg = <0x0 0x10000>;
 106                                 read-only;
 107                         };
 108
 109                         partition@10000 {
 110                                 compatible = "openwrt,uimage", "denx,uimage";
 111                                 openwrt,ih-magic = <IH_MAGIC_OKLI>;
 112                                 openwrt,offset = <0x10000>;
 113                                 label = "firmware";
 114                                 reg = <0x10000 0xfe0000>;
 115                         };
 116
 117                         config: partition@ff0000 {
 118                                 compatible = "nvmem-cells";
 119                                 label = "config";
 120                                 reg = <0xff0000 0x10000>;
 121                                 #address-cells = <1>;
 122                                 #size-cells = <1>;
 123                                 read-only;
 124
 125                                 eeprom_config_e083: eeprom@e083 {
 126                                         reg = <0xe083 0x200>;
 127                                 };
 128
 129                                 macaddr_config_e496: macaddr@e496 {
 130                                         reg = <0xe496 0x6>;
 131                                 };
 132                         };
 133                 };
 134         };
 135 };
 136
 137 &ehci {
 138         status = "okay";
 139 };
 140
 141 &ohci {
 142         status = "okay";
 143 };
 144
 145 &state_default {
 146         default {
 147                 groups = "ephy", "uartf", "spi refclk", "wled";
 148                 function = "gpio";
 149         };
 150 };
 151
 152 &pcie {
 153         status = "okay";
 154 };
 155
 156 &pcie0 {
 157         wifi@0,0 {
 158                 reg = <0x0000 0 0 0 0>;
 159                 nvmem-cells = <&eeprom_config_e083>, <&macaddr_config_e496>;
 160                 nvmem-cell-names = "eeprom", "mac-address";
 161                 mac-address-increment = <(2)>;
 162
 163                 led {
 164                         led-sources = <0>;
 165                         led-active-low;
 166                 };
 167         };
 168 };
 169
 170 &ethernet {
 171         pinctrl-names = "default";
 172         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 173
 174         port@4 {
 175                 status = "okay";
 176                 phy-handle = <&phy4>;
 177                 phy-mode = "rgmii";
 178         };
 179
 180         port@5 {
 181                 status = "okay";
 182                 phy-handle = <&phy5>;
 183                 phy-mode = "rgmii";
 184         };
 185
 186         mdio-bus {
 187                 status = "okay";
 188
 189                 phy4: ethernet-phy@4 {
 190                         reg = <4>;
 191                         phy-mode = "rgmii-rxid";
 192                 };
 193
 194                 phy5: ethernet-phy@5 {
 195                         reg = <5>;
 196                         phy-mode = "rgmii-rxid";
 197                 };
 198         };
 199 };
 200
 201 &gsw {
 202         mediatek,port4-gmac;
 203         mediatek,ephy-base = /bits/ 8 <8>;
 204 };