ramips: mt7621-wdt: use phandle to access system controller registers
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_dlink_dwr-96x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * D-Link DWR-96x Common Board Description
4 * Copyright 2022 Pawel Dembicki <paweldembicki@gmail.com>
5 */
6 #include "mt7620a.dtsi"
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/mtd/partitions/uimage.h>
11
12 / {
13 aliases {
14 led-boot = &led_status;
15 led-failsafe = &led_status;
16 led-running = &led_status;
17 led-upgrade = &led_status;
18 };
19
20 keys {
21 compatible = "gpio-keys";
22
23 reset {
24 label = "reset";
25 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
26 linux,code = <KEY_RESTART>;
27 };
28
29 wps {
30 label = "wps";
31 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_WPS_BUTTON>;
33 };
34
35 };
36
37 leds {
38 compatible = "gpio-leds";
39
40 led_status: status {
41 label = "green:status";
42 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
43 };
44
45 wan {
46 label = "green:wan";
47 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
48 };
49
50 lan {
51 label = "green:lan";
52 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
53 };
54
55 sms {
56 label = "green:sms";
57 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
58 };
59
60 signal_green {
61 label = "green:signal";
62 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
63 };
64
65 signal_red {
66 label = "red:signal";
67 gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
68 };
69
70 4g {
71 label = "green:4g";
72 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
73 };
74
75 3g {
76 label = "green:3g";
77 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
78 };
79
80 wlan5g {
81 label = "green:wlan5g";
82 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
83 linux,default-trigger = "phy0tpt";
84 };
85
86 wlan2g {
87 label = "green:wlan2g";
88 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
89 linux,default-trigger = "phy1tpt";
90 };
91 };
92 };
93
94 &ehci {
95 status = "okay";
96 };
97
98 &gpio1 {
99 status = "okay";
100 };
101
102 &gpio2 {
103 status = "okay";
104 };
105
106 &gpio3 {
107 status = "okay";
108 };
109
110 &ohci {
111 status = "okay";
112 };
113
114 &pcie {
115 status = "okay";
116 };
117
118 &pcie0 {
119 wifi: wifi@0,0 {
120 compatible = "mediatek,mt76";
121 reg = <0x0000 0 0 0 0>;
122 ieee80211-freq-limit = <5000000 6000000>;
123 nvmem-cells = <&macaddr_config_e50e>;
124 nvmem-cell-names = "mac-address";
125 mac-address-increment = <(2)>;
126 };
127 };
128
129 &spi0 {
130 status = "okay";
131
132 flash@0 {
133 compatible = "jedec,spi-nor";
134 reg = <0>;
135 spi-max-frequency = <50000000>;
136
137 partitions {
138 compatible = "fixed-partitions";
139 #address-cells = <1>;
140 #size-cells = <1>;
141
142 partition@0 {
143 label = "jboot";
144 reg = <0x0 0x10000>;
145 read-only;
146 };
147
148 partition@10000 {
149 compatible = "openwrt,uimage", "denx,uimage";
150 openwrt,ih-magic = <IH_MAGIC_OKLI>;
151 openwrt,offset = <0x10000>;
152 label = "firmware";
153 reg = <0x10000 0xfe0000>;
154 };
155
156 config: partition@ff0000 {
157 compatible = "nvmem-cells";
158 #address-cells = <1>;
159 #size-cells = <1>;
160
161 label = "config";
162 reg = <0xff0000 0x10000>;
163 read-only;
164
165 macaddr_config_e50e: macaddr@e50e {
166 reg = <0xe50e 0x6>;
167 };
168 };
169 };
170 };
171 };
172
173 &state_default {
174 default {
175 groups = "i2c", "wled", "spi refclk", "uartf", "ephy";
176 function = "gpio";
177 };
178 };