target/linux/ramips/dts/mt7620a_head-weblink_hdrm200.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "head-weblink,hdrm200", "ralink,mt7620a-soc";
  10         model = "Head Weblink HDRM200";
  11
  12         aliases {
  13                 led-boot = &led_system;
  14                 led-failsafe = &led_system;
  15                 led-running = &led_system;
  16                 led-upgrade = &led_system;
  17         };
  18
  19         chosen {
  20                 bootargs = "console=ttyS1,57600";
  21         };
  22
  23         leds {
  24                 compatible = "gpio-leds";
  25
  26                 rssi {
  27                         label = "red:rssi";
  28                         gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
  29                 };
  30
  31                 led_system: system {
  32                         label = "green:system";
  33                         gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
  34                 };
  35
  36                 air {
  37                         label = "green:wifi";
  38                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  39                 };
  40         };
  41
  42         keys {
  43                 compatible = "gpio-keys";
  44
  45                 wps {
  46                         label = "wps";
  47                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  48                         linux,code = <KEY_WPS_BUTTON>;
  49                 };
  50
  51                 reset {
  52                         label = "reset";
  53                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  54                         linux,code = <KEY_RESTART>;
  55                 };
  56         };
  57 };
  58
  59 &spi0 {
  60         status = "okay";
  61
  62         flash@0 {
  63                 compatible = "jedec,spi-nor";
  64                 reg = <0>;
  65                 spi-max-frequency = <10000000>;
  66
  67                 partitions {
  68                         compatible = "fixed-partitions";
  69                         #address-cells = <1>;
  70                         #size-cells = <1>;
  71
  72                         partition@0 {
  73                                 label = "u-boot";
  74                                 reg = <0x0 0x30000>;
  75                                 read-only;
  76                         };
  77
  78                         partition@30000 {
  79                                 label = "u-boot-env";
  80                                 reg = <0x30000 0x10000>;
  81                                 read-only;
  82                         };
  83
  84                         factory: partition@40000 {
  85                                 compatible = "nvmem-cells";
  86                                 label = "factory";
  87                                 reg = <0x40000 0x10000>;
  88                                 #address-cells = <1>;
  89                                 #size-cells = <1>;
  90                                 read-only;
  91
  92                                 eeprom_factory_0: eeprom@0 {
  93                                         reg = <0x0 0x200>;
  94                                 };
  95
  96                                 eeprom_factory_8000: eeprom@8000 {
  97                                         reg = <0x8000 0x200>;
  98                                 };
  99
 100                                 macaddr_factory_4: macaddr@4 {
 101                                         reg = <0x4 0x6>;
 102                                 };
 103                         };
 104
 105                         firmware: partition@50000 {
 106                                 compatible = "denx,uimage";
 107                                 label = "firmware";
 108                                 reg = <0x50000 0xfb0000>;
 109                         };
 110                 };
 111         };
 112 };
 113
 114 &gpio1 {
 115         status = "okay";
 116 };
 117
 118 &gpio3 {
 119         status = "okay";
 120 };
 121
 122 &sdhci {
 123         status = "okay";
 124 };
 125
 126 &ehci {
 127         status = "okay";
 128 };
 129
 130 &ohci {
 131         status = "okay";
 132 };
 133
 134 &ethernet {
 135         pinctrl-names = "default";
 136         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 137
 138         nvmem-cells = <&macaddr_factory_4>;
 139         nvmem-cell-names = "mac-address";
 140
 141         port@4 {
 142                 status = "okay";
 143                 phy-handle = <&phy4>;
 144                 phy-mode = "rgmii";
 145         };
 146
 147         port@5 {
 148                 status = "okay";
 149                 phy-handle = <&phy5>;
 150                 phy-mode = "rgmii";
 151         };
 152
 153         mdio-bus {
 154                 status = "okay";
 155
 156                 phy4: ethernet-phy@4 {
 157                         reg = <4>;
 158                         phy-mode = "rgmii";
 159                 };
 160
 161                 phy5: ethernet-phy@5 {
 162                         reg = <5>;
 163                         phy-mode = "rgmii";
 164                 };
 165         };
 166 };
 167
 168 &gsw {
 169         mediatek,port4-gmac;
 170         mediatek,ephy-base = /bits/ 8 <8>;
 171 };
 172
 173 &wmac {
 174         nvmem-cells = <&eeprom_factory_0>;
 175         nvmem-cell-names = "eeprom";
 176 };
 177
 178 &state_default {
 179         default {
 180                 groups = "i2c", "uartf", "pa", "spi refclk",
 181                                "wled";
 182                 function = "gpio";
 183         };
 184 };
 185
 186 &pcie {
 187         status = "okay";
 188 };
 189
 190 &pcie0 {
 191         wifi@0,0 {
 192                 compatible = "mediatek,mt76";
 193                 reg = <0x0000 0 0 0 0>;
 194                 nvmem-cells = <&eeprom_factory_8000>;
 195                 nvmem-cell-names = "eeprom";
 196                 ieee80211-freq-limit = <5000000 6000000>;
 197         };
 198 };
 199
 200 &uart {
 201         status = "okay";
 202 };