target/linux/ramips/dts/mt7620a_iptime_a1004ns.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a_iptime.dtsi"
   4
   5 / {
   6         compatible = "iptime,a1004ns", "ralink,mt7620a-soc";
   7         model = "ipTIME A1004ns";
   8
   9         aliases {
  10                 led-boot = &led_cpu;
  11                 led-failsafe = &led_cpu;
  12                 led-running = &led_cpu;
  13                 led-upgrade = &led_cpu;
  14         };
  15
  16         leds {
  17                 compatible = "gpio-leds";
  18
  19                 led_cpu: cpu {
  20                         label = "blue:cpu";
  21                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  22                 };
  23
  24                 usb {
  25                         label = "blue:usb";
  26                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  27                         trigger-sources = <&ohci_port1>, <&ehci_port1>;
  28                         linux,default-trigger = "usbport";
  29                 };
  30         };
  31
  32         keys {
  33                 compatible = "gpio-keys";
  34
  35                 reset {
  36                         label = "reset";
  37                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  38                         linux,code = <KEY_RESTART>;
  39                 };
  40
  41                 wps {
  42                         label = "wps";
  43                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  44                         linux,code = <KEY_WPS_BUTTON>;
  45                 };
  46         };
  47 };
  48
  49 &firmware {
  50         reg = <0x30000 0xfd0000>;
  51 };
  52
  53 &state_default {
  54         gpio {
  55                 groups = "i2c", "uartf", "spi refclk";
  56                 function = "gpio";
  57         };
  58 };
  59
  60 &ethernet {
  61         pinctrl-names = "default";
  62         pinctrl-0 = <&rgmii1_pins &mdio_pins>;
  63
  64         port@5 {
  65                 status = "okay";
  66                 mediatek,fixed-link = <1000 1 1 1>;
  67                 phy-mode = "rgmii";
  68         };
  69
  70         mdio-bus {
  71                 status = "okay";
  72
  73                 ethernet-phy@0 {
  74                         reg = <0>;
  75                         phy-mode = "rgmii";
  76                 };
  77
  78                 ethernet-phy@1 {
  79                         reg = <1>;
  80                         phy-mode = "rgmii";
  81                 };
  82
  83                 ethernet-phy@2 {
  84                         reg = <2>;
  85                         phy-mode = "rgmii";
  86                 };
  87
  88                 ethernet-phy@3 {
  89                         reg = <3>;
  90                         phy-mode = "rgmii";
  91                 };
  92
  93                 ethernet-phy@4 {
  94                         reg = <4>;
  95                         phy-mode = "rgmii";
  96                 };
  97
  98                 ethernet-phy@1f {
  99                         reg = <0x1f>;
 100                         phy-mode = "rgmii";
 101                 };
 102         };
 103 };
 104
 105 &gsw {
 106         mediatek,ephy-base = /bits/ 8 <12>;
 107 };