target/linux/ramips/dts/mt7620a_lb-link_bl-w1200.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "lb-link,bl-w1200", "ralink,mt7620a-soc";
  10         model = "LB-Link BL-W1200";
  11
  12         aliases {
  13                 led-boot = &led_wps;
  14                 led-failsafe = &led_wps;
  15                 led-upgrade = &led_wps;
  16         };
  17
  18         keys {
  19                 compatible = "gpio-keys";
  20
  21                 reset_wps {
  22                         label = "reset_wps";
  23                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  24                         linux,code = <KEY_RESTART>;
  25                 };
  26         };
  27
  28         leds {
  29                 compatible = "gpio-leds";
  30
  31                 led_wps: wps {
  32                         label = "green:wps";
  33                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  34                 };
  35         };
  36 };
  37
  38 &gpio1 {
  39         status = "okay";
  40 };
  41
  42 &spi0 {
  43         status = "okay";
  44
  45         flash@0 {
  46                 compatible = "jedec,spi-nor";
  47                 reg = <0>;
  48                 spi-max-frequency = <50000000>;
  49
  50                 partitions {
  51                         compatible = "fixed-partitions";
  52                         #address-cells = <1>;
  53                         #size-cells = <1>;
  54
  55                         partition@0 {
  56                                 label = "u-boot";
  57                                 reg = <0x0 0x30000>;
  58                                 read-only;
  59                         };
  60
  61                         partition@30000 {
  62                                 label = "config";
  63                                 reg = <0x30000 0x10000>;
  64                                 read-only;
  65                         };
  66
  67                         factory: partition@40000 {
  68                                 label = "factory";
  69                                 reg = <0x40000 0x10000>;
  70                                 read-only;
  71                         };
  72
  73                         partition@50000 {
  74                                 compatible = "denx,uimage";
  75                                 label = "firmware";
  76                                 reg = <0x50000 0x7b0000>;
  77                         };
  78                 };
  79         };
  80 };
  81
  82 &state_default {
  83         gpio {
  84                 groups = "uartf", "spi refclk";
  85                 function = "gpio";
  86         };
  87 };
  88
  89 &ethernet {
  90         pinctrl-names = "default";
  91         pinctrl-0 = <&rgmii2_pins &mdio_pins>;
  92
  93         mtd-mac-address = <&factory 0x28>;
  94
  95         mediatek,portmap = "wllll";
  96
  97         port@5 {
  98                 status = "okay";
  99                 mediatek,fixed-link = <1000 1 1 1>;
 100                 phy-mode = "rgmii";
 101         };
 102
 103         mdio-bus {
 104                 status = "okay";
 105
 106                 ethernet-phy@0 {
 107                         reg = <0>;
 108                         phy-mode = "rgmii";
 109                 };
 110
 111                 ethernet-phy@1 {
 112                         reg = <1>;
 113                         phy-mode = "rgmii";
 114                 };
 115
 116                 ethernet-phy@2 {
 117                         reg = <2>;
 118                         phy-mode = "rgmii";
 119                 };
 120
 121                 ethernet-phy@3 {
 122                         reg = <3>;
 123                         phy-mode = "rgmii";
 124                 };
 125
 126                 ethernet-phy@4 {
 127                         reg = <4>;
 128                         phy-mode = "rgmii";
 129                 };
 130
 131                 ethernet-phy@1f {
 132                         reg = <0x1f>;
 133                         phy-mode = "rgmii";
 134                 };
 135         };
 136 };
 137
 138 &wmac {
 139         ralink,mtd-eeprom = <&factory 0x0>;
 140 };
 141
 142 &pcie {
 143         status = "okay";
 144 };
 145
 146 &pcie0 {
 147         wifi@0,0 {
 148                 compatible = "mediatek,mt76";
 149                 reg = <0x0000 0 0 0 0>;
 150                 ieee80211-freq-limit = <5000000 6000000>;
 151                 mediatek,mtd-eeprom = <&factory 0x8000>;
 152
 153                 led {
 154                         led-sources = <2>;
 155                         led-active-low;
 156                 };
 157         };
 158 };
 159
 160 &ehci {
 161         status = "okay";
 162 };
 163
 164 &ohci {
 165         status = "okay";
 166 };