ramips: increase SPI frequency for Phicomm series devices
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_phicomm_k2g.dts
1 #include "mt7620a.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "phicomm,k2g", "ralink,mt7620a-soc";
8 model = "Phicomm K2G";
9
10 aliases {
11 led-boot = &led_blue;
12 led-failsafe = &led_blue;
13 led-running = &led_blue;
14 led-upgrade = &led_blue;
15 };
16
17 leds {
18 compatible = "gpio-leds";
19
20 led_blue: blue {
21 label = "blue:status";
22 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
23 };
24
25 yellow {
26 label = "yellow:status";
27 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
28 };
29
30 red {
31 label = "red:status";
32 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
33 };
34 };
35
36 keys {
37 compatible = "gpio-keys";
38
39 reset {
40 label = "reset";
41 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RESTART>;
43 };
44 };
45 };
46
47 &spi0 {
48 status = "okay";
49
50 flash@0 {
51 compatible = "jedec,spi-nor";
52 reg = <0>;
53 spi-max-frequency = <80000000>;
54 m25p,fast-read;
55
56 partitions {
57 compatible = "fixed-partitions";
58 #address-cells = <1>;
59 #size-cells = <1>;
60
61 partition@0 {
62 reg = <0x0 0x30000>;
63 label = "u-boot";
64 read-only;
65 };
66
67 partition@30000 {
68 reg = <0x30000 0x10000>;
69 label = "u-boot-env";
70 read-only;
71 };
72
73 factory: partition@40000 {
74 reg = <0x40000 0x10000>;
75 label = "factory";
76 read-only;
77 };
78
79 partition@50000 {
80 reg = <0x50000 0x50000>;
81 label = "permanent_config";
82 read-only;
83 };
84
85 partition@a0000 {
86 compatible = "denx,uimage";
87 reg = <0xa0000 0x760000>;
88 label = "firmware";
89 };
90 };
91 };
92 };
93
94 &state_default {
95 gpio {
96 groups = "i2c", "uartf";
97 function = "gpio";
98 };
99 };
100
101 &ethernet {
102 pinctrl-names = "default";
103 pinctrl-0 = <&rgmii2_pins &mdio_pins>;
104
105 mtd-mac-address = <&factory 0x28>;
106
107 mediatek,portmap = "llllw";
108
109 port@5 {
110 status = "okay";
111 phy-handle = <&phy5>;
112 phy-mode = "rgmii";
113 };
114
115 mdio-bus {
116 status = "okay";
117
118 phy5: ethernet-phy@5 {
119 reg = <5>;
120 phy-mode = "rgmii";
121 };
122 };
123 };
124
125 &pcie {
126 status = "okay";
127 };
128
129 &pcie0 {
130 mt76@0,0 {
131 reg = <0x0000 0 0 0 0>;
132 mediatek,mtd-eeprom = <&factory 0x8000>;
133 ieee80211-freq-limit = <5000000 6000000>;
134 };
135 };
136
137 &wmac {
138 ralink,mtd-eeprom = <&factory 0x0>;
139 pinctrl-names = "default";
140 pinctrl-0 = <&pa_pins>;
141 };