85d43468aac1a2d3fca5dd78e98b7544486c5e75
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_phicomm_k2g.dts
1 #include "mt7620a.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "phicomm,k2g", "ralink,mt7620a-soc";
8 model = "Phicomm K2G";
9
10 aliases {
11 led-boot = &led_blue;
12 led-failsafe = &led_blue;
13 led-running = &led_blue;
14 led-upgrade = &led_blue;
15 };
16
17 leds {
18 compatible = "gpio-leds";
19
20 led_blue: blue {
21 label = "blue:status";
22 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
23 };
24
25 yellow {
26 label = "yellow:status";
27 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
28 };
29
30 red {
31 label = "red:status";
32 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
33 };
34 };
35
36 keys {
37 compatible = "gpio-keys";
38
39 reset {
40 label = "reset";
41 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RESTART>;
43 };
44 };
45 };
46
47 &spi0 {
48 status = "okay";
49
50 flash@0 {
51 compatible = "jedec,spi-nor";
52 reg = <0>;
53 spi-max-frequency = <24000000>;
54
55 partitions {
56 compatible = "fixed-partitions";
57 #address-cells = <1>;
58 #size-cells = <1>;
59
60 partition@0 {
61 reg = <0x0 0x30000>;
62 label = "u-boot";
63 read-only;
64 };
65
66 partition@30000 {
67 reg = <0x30000 0x10000>;
68 label = "u-boot-env";
69 read-only;
70 };
71
72 factory: partition@40000 {
73 reg = <0x40000 0x10000>;
74 label = "factory";
75 read-only;
76 };
77
78 partition@50000 {
79 reg = <0x50000 0x50000>;
80 label = "permanent_config";
81 read-only;
82 };
83
84 partition@a0000 {
85 compatible = "denx,uimage";
86 reg = <0xa0000 0x760000>;
87 label = "firmware";
88 };
89 };
90 };
91 };
92
93 &state_default {
94 gpio {
95 groups = "i2c", "uartf";
96 function = "gpio";
97 };
98 };
99
100 &ethernet {
101 pinctrl-names = "default";
102 pinctrl-0 = <&rgmii2_pins &mdio_pins>;
103
104 mtd-mac-address = <&factory 0x28>;
105
106 mediatek,portmap = "llllw";
107
108 port@5 {
109 status = "okay";
110 phy-handle = <&phy5>;
111 phy-mode = "rgmii";
112 };
113
114 mdio-bus {
115 status = "okay";
116
117 phy5: ethernet-phy@5 {
118 reg = <5>;
119 phy-mode = "rgmii";
120 };
121 };
122 };
123
124 &pcie {
125 status = "okay";
126 };
127
128 &pcie0 {
129 mt76@0,0 {
130 reg = <0x0000 0 0 0 0>;
131 mediatek,mtd-eeprom = <&factory 0x8000>;
132 ieee80211-freq-limit = <5000000 6000000>;
133 };
134 };
135
136 &wmac {
137 ralink,mtd-eeprom = <&factory 0x0>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&pa_pins>;
140 };