ramips: mt7621-wdt: use phandle to access system controller registers
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_planex_cs-qr10.dts
1 #include "mt7620a.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "planex,cs-qr10", "ralink,mt7620a-soc";
8 model = "Planex CS-QR10";
9
10 aliases {
11 led-boot = &led_power;
12 led-failsafe = &led_power;
13 led-running = &led_power;
14 led-upgrade = &led_power;
15 };
16
17 leds {
18 compatible = "gpio-leds";
19
20 led_power: power {
21 label = "red:power";
22 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
23 };
24 };
25
26 keys {
27 compatible = "gpio-keys";
28
29 s1 {
30 label = "reset";
31 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_RESTART>;
33 };
34
35 s2 {
36 label = "wps";
37 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
38 linux,code = <KEY_WPS_BUTTON>;
39 };
40 };
41 };
42
43 &gpio1 {
44 status = "okay";
45 };
46
47 &i2c {
48 status = "okay";
49 };
50
51 &i2s {
52 status = "okay";
53 pinctrl-names = "default";
54 pinctrl-0 = <&pcm_i2s_pins>;
55 };
56
57 &spi0 {
58 status = "okay";
59
60 flash@0 {
61 compatible = "jedec,spi-nor";
62 reg = <0>;
63 spi-max-frequency = <10000000>;
64
65 partitions {
66 compatible = "fixed-partitions";
67 #address-cells = <1>;
68 #size-cells = <1>;
69
70 partition@0 {
71 label = "u-boot";
72 reg = <0x0 0x30000>;
73 read-only;
74 };
75
76 partition@30000 {
77 label = "u-boot-env";
78 reg = <0x30000 0x10000>;
79 read-only;
80 };
81
82 factory: partition@40000 {
83 label = "factory";
84 reg = <0x40000 0x10000>;
85 read-only;
86 };
87
88 partition@50000 {
89 compatible = "denx,uimage";
90 label = "firmware";
91 reg = <0x50000 0x7b0000>;
92 };
93 };
94 };
95 };
96
97 &pcm {
98 status = "okay";
99 };
100
101 &gdma {
102 status = "okay";
103 };
104
105 &state_default {
106 gpio {
107 groups = "spi refclk", "rgmii1";
108 function = "gpio";
109 };
110 wdt {
111 groups = "wdt";
112 function = "wdt refclk";
113 };
114 };
115
116 &ethernet {
117 pinctrl-names = "default";
118 pinctrl-0 = <&ephy_pins>;
119
120 nvmem-cells = <&macaddr_factory_4>;
121 nvmem-cell-names = "mac-address";
122
123 mediatek,portmap = "llllw";
124 };
125
126 &sdhci {
127 status = "okay";
128 };
129
130 &ehci {
131 status = "okay";
132 };
133
134 &ohci {
135 status = "okay";
136 };
137
138 &wmac {
139 ralink,mtd-eeprom = <&factory 0x0>;
140 };
141
142 &factory {
143 compatible = "nvmem-cells";
144 #address-cells = <1>;
145 #size-cells = <1>;
146
147 macaddr_factory_4: macaddr@4 {
148 reg = <0x4 0x6>;
149 };
150 };