target/linux/ramips/dts/mt7620a_ralink_mt7620a-mt7530-evb.dts

   1 #include "mt7620a.dtsi"
   2
   3 / {
   4         compatible = "ralink,mt7620a-mt7530-evb", "ralink,mt7620a-soc";
   5         model = "Ralink MT7620a + MT7530 evaluation board";
   6 };
   7
   8 &spi0 {
   9         status = "okay";
  10
  11         flash@0 {
  12                 compatible = "jedec,spi-nor";
  13                 reg = <0>;
  14                 spi-max-frequency = <10000000>;
  15
  16                 partitions {
  17                         compatible = "fixed-partitions";
  18                         #address-cells = <1>;
  19                         #size-cells = <1>;
  20
  21                         partition@0 {
  22                                 label = "u-boot";
  23                                 reg = <0x0 0x30000>;
  24                                 read-only;
  25                         };
  26
  27                         partition@30000 {
  28                                 label = "u-boot-env";
  29                                 reg = <0x30000 0x10000>;
  30                                 read-only;
  31                         };
  32
  33                         factory: partition@40000 {
  34                                 label = "factory";
  35                                 reg = <0x40000 0x10000>;
  36                                 read-only;
  37                         };
  38
  39                         partition@50000 {
  40                                 compatible = "denx,uimage";
  41                                 label = "firmware";
  42                                 reg = <0x50000 0x7b0000>;
  43                         };
  44                 };
  45         };
  46 };
  47
  48 &state_default {
  49         gpio {
  50                 groups = "i2c", "uartf";
  51                 function = "gpio";
  52         };
  53 };
  54
  55 &ethernet {
  56         pinctrl-names = "default";
  57         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
  58
  59         mediatek,portmap = "llllw";
  60
  61         port@5 {
  62                 status = "okay";
  63                 mediatek,fixed-link = <1000 1 1 1>;
  64                 phy-mode = "rgmii";
  65         };
  66
  67         mdio-bus {
  68                 status = "okay";
  69
  70                 phy0: ethernet-phy@0 {
  71                         reg = <0>;
  72                         phy-mode = "rgmii";
  73                 };
  74
  75                 phy1: ethernet-phy@1 {
  76                         reg = <1>;
  77                         phy-mode = "rgmii";
  78                 };
  79
  80                 phy2: ethernet-phy@2 {
  81                         reg = <2>;
  82                         phy-mode = "rgmii";
  83                 };
  84
  85                 phy3: ethernet-phy@3 {
  86                         reg = <3>;
  87                         phy-mode = "rgmii";
  88                 };
  89
  90                 phy4: ethernet-phy@4 {
  91                         reg = <4>;
  92                         phy-mode = "rgmii";
  93                 };
  94
  95                 phy1f: ethernet-phy@1f {
  96                         reg = <0x1f>;
  97                         phy-mode = "rgmii";
  98                 };
  99         };
 100 };
 101
 102 &gsw {
 103         mediatek,ephy-base = /bits/ 8 <12>;
 104 };
 105
 106 &pcie {
 107         status = "okay";
 108 };
 109
 110 &ehci {
 111         status = "okay";
 112 };
 113
 114 &ohci {
 115         status = "okay";
 116 };