ramips: fix DTS EEPROM property for some MT7628 devices
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_sanlinking_d240.dts
1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright(c) 2017 Kristian Evensen <kristian.evensen@gmail.com>.
4 * All rights reserved.
5 */
6
7 #include "mt7620a.dtsi"
8
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11
12 / {
13 compatible = "sanlinking,d240", "ralink,mt7620a-soc";
14 model = "Sanlinking Technologies D240";
15
16 aliases {
17 led-boot = &led_power;
18 led-failsafe = &led_power;
19 led-running = &led_power;
20 led-upgrade = &led_power;
21 };
22
23 chosen {
24 bootargs = "console=ttyS0,115200";
25 };
26
27 gpio-export {
28 compatible = "gpio-export";
29 #size-cells = <0>;
30
31 power_mpcie2 {
32 gpio-export,name = "power_mpcie2";
33 gpio-export,output = <1>;
34 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
35 };
36
37 power_mpcie1 {
38 gpio-export,name = "power_mpcie1";
39 gpio-export,output = <1>;
40 gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
41 };
42 };
43
44 leds {
45 compatible = "gpio-leds";
46
47 led_power: power {
48 label = "blue:power";
49 gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
50 };
51
52 usb {
53 label = "blue:usb";
54 gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
55 trigger-sources = <&ohci_port1>, <&ehci_port1>;
56 linux,default-trigger = "usbport";
57 };
58
59 air {
60 label = "blue:wifi";
61 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
62 };
63 };
64
65 keys {
66 compatible = "gpio-keys";
67
68 reset {
69 label = "reset";
70 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
71 linux,code = <KEY_RESTART>;
72 };
73 };
74 };
75
76 &gpio1 {
77 status = "okay";
78 };
79
80 &gpio2 {
81 status = "okay";
82 };
83
84 &gpio3 {
85 status = "okay";
86 };
87
88 &spi0 {
89 status = "okay";
90
91 flash@0 {
92 compatible = "jedec,spi-nor";
93 reg = <0>;
94 spi-max-frequency = <10000000>;
95
96 partitions {
97 compatible = "fixed-partitions";
98 #address-cells = <1>;
99 #size-cells = <1>;
100
101 partition@0 {
102 label = "u-boot";
103 reg = <0x0 0x30000>;
104 read-only;
105 };
106
107 partition@30000 {
108 label = "u-boot-env";
109 reg = <0x30000 0x10000>;
110 read-only;
111 };
112
113 factory: partition@40000 {
114 label = "factory";
115 reg = <0x40000 0x10000>;
116 read-only;
117 };
118
119 partition@50000 {
120 compatible = "denx,uimage";
121 label = "firmware";
122 reg = <0x50000 0xfb0000>;
123 };
124 };
125 };
126 };
127
128 &sdhci {
129 status = "okay";
130 /* the pins function is already set during pinmux driver load */
131 /delete-property/ pinctrl-0;
132 };
133
134 &ehci {
135 status = "okay";
136 };
137
138 &ohci {
139 status = "okay";
140 };
141
142 &ethernet {
143 nvmem-cells = <&macaddr_factory_4>;
144 nvmem-cell-names = "mac-address";
145
146 mediatek,portmap = "llllw";
147 };
148
149 &wmac {
150 ralink,mtd-eeprom = <&factory 0x0>;
151 };
152
153 &state_default {
154 default {
155 groups = "i2c", "uartf", "wled", "spi refclk", "pa";
156 function = "gpio";
157 };
158
159 /*
160 * The sd function of the nd_sd group configures two of the
161 * groups pins as gpios. The pins are used as PCIe reset/power.
162 * Due to the driver load order, the pins are configured way to
163 * late if triggered by the sd-card driver.
164 * To not introduce another kind of driver load order
165 * dependency and configure the pins as early as possible,
166 * means during pinmux driver load.
167 */
168 gpio_sd {
169 groups = "nd_sd";
170 function = "sd";
171 };
172 };
173
174 &pcie {
175 status = "okay";
176 };
177
178 &factory {
179 compatible = "nvmem-cells";
180 #address-cells = <1>;
181 #size-cells = <1>;
182
183 macaddr_factory_4: macaddr@4 {
184 reg = <0x4 0x6>;
185 };
186 };