target/linux/ramips/dts/mt7620a_tplink_re210-v1.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a_tplink_re2x0-v1.dtsi"
   4
   5 / {
   6         compatible = "tplink,re210-v1", "ralink,mt7620a-soc";
   7         model = "TP-Link RE210 v1";
   8
   9         aliases {
  10                 led-boot = &led_power;
  11                 led-failsafe = &led_power;
  12                 led-running = &led_power;
  13                 led-upgrade = &led_power;
  14         };
  15
  16         leds {
  17                 compatible = "gpio-leds";
  18
  19                 led_power: power {
  20                         label = "green:power";
  21                         gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
  22                 };
  23
  24                 rssi_high {
  25                         label = "green:rssi-high";
  26                         gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
  27                 };
  28
  29                 rssi_low {
  30                         label = "red:rssi-low";
  31                         gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
  32                 };
  33
  34                 wlan2g {
  35                         label = "green:wlan2g";
  36                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  37                         linux,default-trigger = "phy1tpt";
  38                 };
  39
  40                 wlan5g {
  41                         label = "green:wlan5g";
  42                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  43                         linux,default-trigger = "phy0tpt";
  44                 };
  45         };
  46 };
  47
  48 &keys {
  49         led_power {
  50                 label = "LED power";
  51                 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
  52                 linux,code = <BTN_0>;
  53         };
  54 };
  55
  56 &state_default {
  57         gpio {
  58                 groups = "i2c", "uartf", "wled", "rgmii1";
  59                 function = "gpio";
  60         };
  61 };
  62
  63 &gsw {
  64         mediatek,port4-gmac;
  65         mediatek,ephy-base = /bits/ 8 <8>;
  66 };
  67
  68 &ethernet {
  69         pinctrl-names = "default";
  70         pinctrl-0 = <&rgmii2_pins &mdio_pins>;
  71
  72         port@4 {
  73                 status = "okay";
  74
  75                 phy-handle = <&phy4>;
  76                 phy-mode = "rgmii";
  77         };
  78
  79         mdio-bus {
  80                 status = "okay";
  81
  82                 phy4: ethernet-phy@4 {
  83                         reg = <4>;
  84                         phy-mode = "rgmii";
  85                 };
  86         };
  87 };
  88
  89 &gpio1 {
  90         status = "okay";
  91 };
  92
  93 &gpio3 {
  94         status = "okay";
  95 };