target/linux/ramips/dts/mt7620a_wevo_air-duo.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         compatible = "wevo,air-duo", "ralink,mt7620a-soc";
  11         model = "WeVO AIR DUO";
  12
  13         aliases {
  14                 led-boot = &led_status;
  15                 led-failsafe = &led_status;
  16                 led-running = &led_status;
  17                 led-upgrade = &led_status;
  18                 label-mac-device = &ethernet;
  19         };
  20
  21         leds {
  22                 compatible = "gpio-leds";
  23
  24                 led_status: led-0 {
  25                         color = <LED_COLOR_ID_BLUE>;
  26                         function = LED_FUNCTION_STATUS;
  27                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  28                 };
  29
  30                 led-1 {
  31                         color = <LED_COLOR_ID_BLUE>;
  32                         function = LED_FUNCTION_WPS;
  33                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  34                 };
  35         };
  36
  37         keys {
  38                 compatible = "gpio-keys";
  39
  40                 wps {
  41                         label = "wps";
  42                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  43                         linux,code = <KEY_WPS_BUTTON>;
  44                 };
  45
  46                 reset {
  47                         label = "reset";
  48                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  49                         linux,code = <KEY_RESTART>;
  50                 };
  51         };
  52 };
  53
  54 &gpio1 {
  55         status = "okay";
  56 };
  57
  58 &spi0 {
  59         status = "okay";
  60
  61         flash@0 {
  62                 compatible = "jedec,spi-nor";
  63                 reg = <0>;
  64                 spi-max-frequency = <50000000>;
  65
  66                 partitions {
  67                         compatible = "fixed-partitions";
  68                         #address-cells = <1>;
  69                         #size-cells = <1>;
  70
  71                         partition@0 {
  72                                 label = "u-boot";
  73                                 reg = <0x0 0x30000>;
  74                                 read-only;
  75                         };
  76
  77                         partition@30000 {
  78                                 label = "config";
  79                                 reg = <0x30000 0x10000>;
  80                                 read-only;
  81                         };
  82
  83                         factory: partition@40000 {
  84                                 label = "factory";
  85                                 reg = <0x40000 0x10000>;
  86                                 read-only;
  87
  88                                 nvmem-layout {
  89                                         compatible = "fixed-layout";
  90                                         #address-cells = <1>;
  91                                         #size-cells = <1>;
  92
  93                                         eeprom_factory_0: eeprom@0 {
  94                                                 reg = <0x0 0x200>;
  95                                         };
  96
  97                                         eeprom_factory_8000: eeprom@8000 {
  98                                                 reg = <0x8000 0x200>;
  99                                         };
 100
 101                                         macaddr_factory_4: macaddr@4 {
 102                                                 reg = <0x4 0x6>;
 103                                         };
 104                                 };
 105                         };
 106
 107                         partition@50000 {
 108                                 compatible = "denx,uimage";
 109                                 label = "firmware";
 110                                 reg = <0x50000 0xeb0000>;
 111                         };
 112
 113                         partition@f00000 {
 114                                 label = "db";
 115                                 reg = <0xf00000 0x100000>;
 116                                 read-only;
 117                         };
 118                 };
 119         };
 120 };
 121
 122 &state_default {
 123         gpio {
 124                 groups = "i2c", "uartf", "spi refclk";
 125                 function = "gpio";
 126         };
 127 };
 128
 129 &ethernet {
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&rgmii1_pins &mdio_pins>;
 132         nvmem-cells = <&macaddr_factory_4>;
 133         nvmem-cell-names = "mac-address";
 134
 135         port@5 {
 136                 status = "okay";
 137                 mediatek,fixed-link = <1000 1 1 1>;
 138                 phy-mode = "rgmii";
 139         };
 140
 141         mdio-bus {
 142                 status = "okay";
 143
 144                 ethernet-phy@0 {
 145                         reg = <0>;
 146                         phy-mode = "rgmii";
 147                 };
 148
 149                 ethernet-phy@1 {
 150                         reg = <1>;
 151                         phy-mode = "rgmii";
 152                 };
 153
 154                 ethernet-phy@2 {
 155                         reg = <2>;
 156                         phy-mode = "rgmii";
 157                 };
 158
 159                 ethernet-phy@3 {
 160                         reg = <3>;
 161                         phy-mode = "rgmii";
 162                 };
 163
 164                 ethernet-phy@4 {
 165                         reg = <4>;
 166                         phy-mode = "rgmii";
 167                 };
 168
 169                 ethernet-phy@1f {
 170                         reg = <0x1f>;
 171                         phy-mode = "rgmii";
 172                 };
 173         };
 174 };
 175
 176 &gsw {
 177         mediatek,ephy-base = /bits/ 8 <12>;
 178 };
 179
 180 &ehci {
 181         status = "okay";
 182 };
 183
 184 &ohci {
 185         status = "okay";
 186 };
 187
 188 &pcie {
 189         status = "okay";
 190 };
 191
 192 &pcie0 {
 193         wifi@0,0 {
 194                 compatible = "mediatek,mt76";
 195                 reg = <0x0000 0 0 0 0>;
 196                 nvmem-cells = <&eeprom_factory_8000>;
 197                 nvmem-cell-names = "eeprom";
 198                 ieee80211-freq-limit = <5000000 6000000>;
 199
 200                 led {
 201                         led-sources = <2>;
 202                         led-active-low;
 203                 };
 204         };
 205 };
 206
 207 &wmac {
 208         pinctrl-names = "default";
 209         pinctrl-0 = <&wled_pins>;
 210         nvmem-cells = <&eeprom_factory_0>;
 211         nvmem-cell-names = "eeprom";
 212 };