mac80211: rt2x00: experimental improvements for MT7620 wifi
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_zbtlink_zbt-ape522ii.dts
1 #include "mt7620a.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "zbtlink,zbt-ape522ii", "ralink,mt7620a-soc";
8 model = "Zbtlink ZBT-APE522II";
9
10 chosen {
11 bootargs = "console=ttyS0,115200";
12 };
13
14 leds {
15 compatible = "gpio-leds";
16
17 sys1 {
18 label = "green:sys1";
19 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
20 };
21
22 sys2 {
23 label = "green:sys2";
24 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
25 };
26
27 sys3 {
28 label = "green:sys3";
29 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
30 };
31
32 sys4 {
33 label = "green:sys4";
34 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
35 };
36
37 wlan2g4 {
38 label = "green:wlan2g4";
39 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
40 };
41 };
42
43 keys {
44 compatible = "gpio-keys";
45
46 reset {
47 label = "reset";
48 gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
49 linux,code = <KEY_RESTART>;
50 };
51 };
52 };
53
54 &gpio3 {
55 status = "okay";
56 };
57
58 &spi0 {
59 status = "okay";
60
61 flash@0 {
62 compatible = "jedec,spi-nor";
63 reg = <0>;
64 spi-max-frequency = <10000000>;
65
66 partitions {
67 compatible = "fixed-partitions";
68 #address-cells = <1>;
69 #size-cells = <1>;
70
71 partition@0 {
72 label = "u-boot";
73 reg = <0x0 0x30000>;
74 };
75
76 partition@30000 {
77 label = "u-boot-env";
78 reg = <0x30000 0x10000>;
79 read-only;
80 };
81
82 factory: partition@40000 {
83 label = "factory";
84 reg = <0x40000 0x10000>;
85 read-only;
86 };
87
88 partition@50000 {
89 compatible = "denx,uimage";
90 label = "firmware";
91 reg = <0x50000 0xf80000>;
92 };
93 };
94 };
95 };
96
97 &ethernet {
98 pinctrl-names = "default";
99 pinctrl-0 = <&ephy_pins>;
100
101 nvmem-cells = <&macaddr_factory_4>;
102 nvmem-cell-names = "mac-address";
103
104 mediatek,portmap = "llllw";
105 };
106
107 &wmac {
108 ralink,mtd-eeprom = <&factory 0x0>;
109
110 pinctrl-names = "default", "pa_gpio";
111 pinctrl-0 = <&pa_pins>;
112 pinctrl-1 = <&pa_gpio_pins>;
113 };
114
115 &pcie {
116 status = "okay";
117 };
118
119 &pcie0 {
120 mt76@0,0 {
121 reg = <0x0000 0 0 0 0>;
122 mediatek,mtd-eeprom = <&factory 0x8000>;
123 ieee80211-freq-limit = <5000000 6000000>;
124 };
125 };
126
127 &state_default {
128 gpio {
129 groups = "wled", "i2c", "uartf", "wdt";
130 function = "gpio";
131 };
132 };
133
134 &factory {
135 compatible = "nvmem-cells";
136 #address-cells = <1>;
137 #size-cells = <1>;
138
139 macaddr_factory_4: macaddr@4 {
140 reg = <0x4 0x6>;
141 };
142 };