ramips: add support for YunCore G720
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_zyxel_keenetic-viva.dts
1 #include "mt7620a.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6
7 / {
8 compatible = "zyxel,keenetic-viva", "ralink,mt7620a-soc";
9 model = "ZyXEL Keenetic Viva";
10
11 aliases {
12 led-boot = &led_power_green;
13 led-failsafe = &led_power_green;
14 led-running = &led_power_green;
15 led-upgrade = &led_power_green;
16 };
17
18 leds {
19 compatible = "gpio-leds";
20
21 wan {
22 function = LED_FUNCTION_WAN;
23 color = <LED_COLOR_ID_GREEN>;
24 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
25 };
26
27 usb {
28 function = LED_FUNCTION_USB;
29 color = <LED_COLOR_ID_GREEN>;
30 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
31 trigger-sources = <&ohci_port1>, <&ehci_port1>;
32 linux,default-trigger = "usbport";
33 };
34
35 power_alert {
36 function = LED_FUNCTION_POWER;
37 color = <LED_COLOR_ID_RED>;
38 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
39 };
40
41 wifi {
42 label = "green:wifi";
43 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
44 };
45
46 led_power_green: power {
47 function = LED_FUNCTION_POWER;
48 color = <LED_COLOR_ID_GREEN>;
49 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
50 };
51 };
52
53 keys {
54 compatible = "gpio-keys";
55
56 reset {
57 label = "reset";
58 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
59 linux,code = <KEY_RESTART>;
60 };
61
62 wps {
63 label = "wps";
64 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
65 linux,code = <KEY_WPS_BUTTON>;
66 };
67
68 fn {
69 label = "fn";
70 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
71 linux,code = <BTN_0>;
72 };
73 };
74
75 gpio_export {
76 compatible = "gpio-export";
77 #size-cells = <0>;
78
79 usb_power {
80 gpio-export,name = "usb";
81 gpio-export,output = <1>;
82 gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
83 };
84 };
85
86 rtl8367rb {
87 compatible = "realtek,rtl8367b";
88 cpu_port = <7>;
89 realtek,extif2 = <1 0 1 1 1 1 1 1 2>;
90 mii-bus = <&mdio0>;
91 };
92 };
93
94 &spi0 {
95 status = "okay";
96
97 flash@0 {
98 compatible = "jedec,spi-nor";
99 reg = <0>;
100 spi-max-frequency = <10000000>;
101
102 partitions {
103 compatible = "fixed-partitions";
104 #address-cells = <1>;
105 #size-cells = <1>;
106
107 partition@0 {
108 label = "u-boot";
109 reg = <0x0 0x30000>;
110 read-only;
111 };
112
113 partition@30000 {
114 label = "u-boot-env";
115 reg = <0x30000 0x10000>;
116 read-only;
117 };
118
119 partition@40000 {
120 label = "factory";
121 reg = <0x40000 0x10000>;
122 read-only;
123
124 nvmem-layout {
125 compatible = "fixed-layout";
126 #address-cells = <1>;
127 #size-cells = <1>;
128
129 eeprom_factory_0: eeprom@0 {
130 reg = <0x0 0x200>;
131 };
132
133 macaddr_factory_4: macaddr@4 {
134 reg = <0x4 0x6>;
135 };
136 };
137 };
138
139 partition@50000 {
140 compatible = "denx,uimage";
141 label = "firmware";
142 reg = <0x50000 0xfb0000>;
143 };
144 };
145 };
146 };
147
148 &state_default {
149 gpio {
150 groups = "i2c", "uartf";
151 function = "gpio";
152 };
153 };
154
155 &ethernet {
156 pinctrl-names = "default";
157 pinctrl-0 = <&rgmii2_pins &mdio_pins>;
158
159 nvmem-cells = <&macaddr_factory_4>;
160 nvmem-cell-names = "mac-address";
161
162 port@4 {
163 status = "okay";
164 mediatek,fixed-link = <1000 1 1 1>;
165 phy-mode = "rgmii";
166 phy-handle = <&phy4>;
167 };
168
169 mdio0: mdio-bus {
170 status = "okay";
171
172 phy4: ethernet-phy@4 {
173 reg = <4>;
174 phy-mode = "rgmii";
175 };
176 };
177 };
178
179 &gsw {
180 mediatek,port4-gmac;
181 mediatek,ephy-base = /bits/ 8 <8>;
182 };
183
184 &wmac {
185 nvmem-cells = <&eeprom_factory_0>;
186 nvmem-cell-names = "eeprom";
187 };
188
189 &ehci {
190 status = "okay";
191 };
192
193 &ohci {
194 status = "okay";
195 };