ramips: mt7620a: convert to nvmem-layout
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7621_phicomm_k2p.dts
1 #include "mt7621.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "phicomm,k2p", "mediatek,mt7621-soc";
8 model = "Phicomm K2P";
9
10 aliases {
11 led-boot = &led_blue;
12 led-failsafe = &led_blue;
13 led-running = &led_blue;
14 led-upgrade = &led_blue;
15 };
16
17 leds {
18 compatible = "gpio-leds";
19
20 stat_r {
21 label = "red:status";
22 gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
23 };
24
25 stat_y {
26 label = "yellow:status";
27 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
28 };
29
30 led_blue: stat_b {
31 label = "blue:status";
32 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
33 };
34 };
35
36 keys {
37 compatible = "gpio-keys";
38
39 reset {
40 label = "reset";
41 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RESTART>;
43 };
44 };
45 };
46
47 &spi0 {
48 status = "okay";
49
50 flash@0 {
51 compatible = "jedec,spi-nor";
52 reg = <0>;
53 spi-max-frequency = <50000000>;
54
55 partitions {
56 compatible = "fixed-partitions";
57 #address-cells = <1>;
58 #size-cells = <1>;
59
60 partition@0 {
61 label = "u-boot";
62 reg = <0x0 0x30000>;
63 read-only;
64 };
65
66 partition@30000 {
67 label = "u-boot-env";
68 reg = <0x30000 0x10000>;
69 read-only;
70 };
71
72 factory: partition@40000 {
73 compatible = "nvmem-cells";
74 label = "factory";
75 reg = <0x40000 0x10000>;
76 #address-cells = <1>;
77 #size-cells = <1>;
78 read-only;
79
80 eeprom_factory_0: eeprom@0 {
81 reg = <0x0 0x4da8>;
82 };
83
84 macaddr_factory_4: macaddr@4 {
85 reg = <0x4 0x6>;
86 };
87
88 macaddr_factory_e000: macaddr@e000 {
89 reg = <0xe000 0x6>;
90 };
91
92 macaddr_factory_e006: macaddr@e006 {
93 reg = <0xe006 0x6>;
94 };
95 };
96
97 partition@50000 {
98 label = "permanent_config";
99 reg = <0x50000 0x50000>;
100 read-only;
101 };
102
103 partition@a0000 {
104 compatible = "denx,uimage";
105 label = "firmware";
106 reg = <0xa0000 0xf60000>;
107 };
108 };
109 };
110 };
111
112 &pcie {
113 status = "okay";
114 };
115
116 &pcie0 {
117 wifi@0,0 {
118 compatible = "mediatek,mt76";
119 reg = <0x0000 0 0 0 0>;
120
121 /* 5 GHz (phy1) does not take the address from calibration data,
122 but setting it manually here works */
123 nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_4>;
124 nvmem-cell-names = "eeprom", "mac-address";
125 };
126 };
127
128 &gmac0 {
129 nvmem-cells = <&macaddr_factory_e000>;
130 nvmem-cell-names = "mac-address";
131 };
132
133 &gmac1 {
134 status = "okay";
135 label = "wan";
136 phy-handle = <&ethphy4>;
137
138 nvmem-cells = <&macaddr_factory_e006>;
139 nvmem-cell-names = "mac-address";
140 };
141
142 &mdio {
143 ethphy4: ethernet-phy@4 {
144 reg = <4>;
145 };
146 };
147
148 &switch0 {
149 ports {
150 port@0 {
151 status = "okay";
152 label = "lan1";
153 };
154
155 port@1 {
156 status = "okay";
157 label = "lan2";
158 };
159
160 port@2 {
161 status = "okay";
162 label = "lan3";
163 };
164
165 port@3 {
166 status = "okay";
167 label = "lan4";
168 };
169 };
170 };
171
172 &state_default {
173 gpio {
174 groups = "i2c", "jtag";
175 function = "gpio";
176 };
177 };