ramips: mt7621: fix Ubiquiti ER-X ports names and MAC addresses
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7621_ubiquiti_edgerouterx.dtsi
1 #include "mt7621.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 aliases {
8 label-mac-device = &gmac0;
9 };
10
11 chosen {
12 bootargs = "console=ttyS0,57600";
13 };
14
15 keys {
16 compatible = "gpio-keys";
17
18 reset {
19 label = "reset";
20 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
21 linux,code = <KEY_RESTART>;
22 };
23 };
24 };
25
26 &gmac0 {
27 mtd-mac-address = <&factory 0x22>;
28 label = "dsa";
29 };
30
31 &switch0 {
32 ports {
33 port@0 {
34 status = "okay";
35 label = "eth0";
36 };
37
38 port@1 {
39 status = "okay";
40 label = "eth1";
41 mtd-mac-address = <&factory 0x22>;
42 mtd-mac-address-increment = <1>;
43 };
44
45 port@2 {
46 status = "okay";
47 label = "eth2";
48 mtd-mac-address = <&factory 0x22>;
49 mtd-mac-address-increment = <2>;
50 };
51
52 port@3 {
53 status = "okay";
54 label = "eth3";
55 mtd-mac-address = <&factory 0x22>;
56 mtd-mac-address-increment = <3>;
57 };
58
59 port@4 {
60 status = "okay";
61 label = "eth4";
62 mtd-mac-address = <&factory 0x22>;
63 mtd-mac-address-increment = <4>;
64 };
65 };
66 };
67
68 &nand {
69 status = "okay";
70
71 partitions {
72 compatible = "fixed-partitions";
73 #address-cells = <1>;
74 #size-cells = <1>;
75
76 partition@0 {
77 label = "u-boot";
78 reg = <0x0 0x80000>;
79 read-only;
80 };
81
82 partition@80000 {
83 label = "u-boot-env";
84 reg = <0x80000 0x60000>;
85 read-only;
86 };
87
88 factory: partition@e0000 {
89 label = "factory";
90 reg = <0xe0000 0x60000>;
91 };
92
93 partition@140000 {
94 label = "kernel1";
95 reg = <0x140000 0x300000>;
96 };
97
98 partition@440000 {
99 label = "kernel2";
100 reg = <0x440000 0x300000>;
101 };
102
103 partition@740000 {
104 label = "ubi";
105 reg = <0x740000 0xf7c0000>;
106 };
107 };
108 };
109
110 &state_default {
111 gpio {
112 groups = "uart2", "uart3", "i2c", "pcie", "rgmii2", "jtag";
113 function = "gpio";
114 };
115 };
116
117 &spi0 {
118 /*
119 * This board has 2Mb spi flash soldered in and visible
120 * from manufacturer's firmware.
121 * But this SoC shares spi and nand pins,
122 * and current driver doesn't handle this sharing well
123 */
124 status = "disabled";
125
126 m25p80@1 {
127 compatible = "jedec,spi-nor";
128 reg = <1>;
129 spi-max-frequency = <10000000>;
130
131 partitions {
132 compatible = "fixed-partitions";
133 #address-cells = <1>;
134 #size-cells = <1>;
135
136 partition@0 {
137 label = "spi";
138 reg = <0x0 0x200000>;
139 read-only;
140 };
141 };
142 };
143 };
144
145 &xhci {
146 status = "disabled";
147 };