target/linux/ramips/dts/mt7621_ubiquiti_edgerouterx.dtsi

   1 #include "mt7621.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         compatible = "ubiquiti,edgerouterx", "mediatek,mt7621-soc";
   8
   9         chosen {
  10                 bootargs = "console=ttyS0,57600";
  11         };
  12
  13         keys {
  14                 compatible = "gpio-keys-polled";
  15                 poll-interval = <20>;
  16
  17                 reset {
  18                         label = "reset";
  19                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  20                         linux,code = <KEY_RESTART>;
  21                 };
  22         };
  23 };
  24
  25 &ethernet {
  26         mtd-mac-address = <&factory 0x22>;
  27 };
  28
  29 &nand {
  30         status = "okay";
  31
  32         partitions {
  33                 compatible = "fixed-partitions";
  34                 #address-cells = <1>;
  35                 #size-cells = <1>;
  36
  37                 partition@0 {
  38                         label = "u-boot";
  39                         reg = <0x0 0x80000>;
  40                         read-only;
  41                 };
  42
  43                 partition@80000 {
  44                         label = "u-boot-env";
  45                         reg = <0x80000 0x60000>;
  46                         read-only;
  47                 };
  48
  49                 factory: partition@e0000 {
  50                         label = "factory";
  51                         reg = <0xe0000 0x60000>;
  52                 };
  53
  54                 partition@140000 {
  55                         label = "kernel1";
  56                         reg = <0x140000 0x300000>;
  57                 };
  58
  59                 partition@440000 {
  60                         label = "kernel2";
  61                         reg = <0x440000 0x300000>;
  62                 };
  63
  64                 partition@740000 {
  65                         label = "ubi";
  66                         reg = <0x740000 0xf7c0000>;
  67                 };
  68         };
  69 };
  70
  71 &pinctrl {
  72         state_default: pinctrl0 {
  73                 gpio {
  74                         ralink,group = "uart2", "uart3", "i2c", "pcie", "rgmii2", "jtag";
  75                         ralink,function = "gpio";
  76                 };
  77         };
  78 };
  79
  80 &spi0 {
  81         /*
  82          * This board has 2Mb spi flash soldered in and visible
  83          * from manufacturer's firmware.
  84          * But this SoC shares spi and nand pins,
  85          * and current driver doesn't handle this sharing well
  86          */
  87         status = "disabled";
  88
  89         m25p80@1 {
  90                 compatible = "jedec,spi-nor";
  91                 reg = <1>;
  92                 spi-max-frequency = <10000000>;
  93
  94                 partitions {
  95                         compatible = "fixed-partitions";
  96                         #address-cells = <1>;
  97                         #size-cells = <1>;
  98
  99                         partition@0 {
 100                                 label = "spi";
 101                                 reg = <0x0 0x200000>;
 102                                 read-only;
 103                         };
 104                 };
 105         };
 106 };
 107
 108 &xhci {
 109         status = "disabled";
 110 };