ramips: cf-ew72-v2: Add support for COMFAST CF-EW72 V2
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7628an_tplink_tl-mr6400-v4.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "mt7628an_tplink_8m.dtsi"
4
5 / {
6 compatible = "tplink,tl-mr6400-v4", "mediatek,mt7628an-soc";
7 model = "TP-Link TL-MR6400 v4";
8
9 aliases {
10 led-boot = &led_power;
11 led-failsafe = &led_power;
12 led-running = &led_power;
13 led-upgrade = &led_power;
14 };
15
16 keys {
17 compatible = "gpio-keys";
18
19 reset {
20 label = "reset";
21 gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
22 linux,code = <KEY_RESTART>;
23 };
24
25 rfkill {
26 label = "rfkill";
27 gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
28 linux,code = <KEY_RFKILL>;
29 };
30 };
31
32 leds {
33 compatible = "gpio-leds";
34
35 led_power: power {
36 label = "white:power";
37 gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
38 };
39
40 wan {
41 label = "white:wan";
42 gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
43 };
44
45 wlan {
46 label = "white:wlan";
47 gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
48 linux,default-trigger = "phy0tpt";
49 };
50
51 lan {
52 label = "white:lan";
53 gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
54 };
55
56 signal1 {
57 label = "white:signal1";
58 gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
59 };
60
61 signal2 {
62 label = "white:signal2";
63 gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
64 };
65
66 signal3 {
67 label = "white:signal3";
68 gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
69 };
70 };
71 };
72
73 &state_default {
74 gpio {
75 groups = "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "refclk", "uart1", "wdt", "wled_an";
76 function = "gpio";
77 };
78 };
79
80 &esw {
81 mediatek,portmap = <0x2f>;
82 mediatek,portdisable = <0x21>;
83 };
84
85 &wmac {
86 nvmem-cells = <&macaddr_factory_1f100>;
87 nvmem-cell-names = "mac-address";
88 };
89
90 &ethernet {
91 nvmem-cells = <&macaddr_factory_1f100>;
92 nvmem-cell-names = "mac-address";
93 };
94
95 &factory {
96 compatible = "nvmem-cells";
97 #address-cells = <1>;
98 #size-cells = <1>;
99
100 macaddr_factory_1f100: macaddr@1f100 {
101 reg = <0x1f100 0x6>;
102 };
103 };