target/linux/ramips/dts/mt7628an_wavlink_wl-wn575a3.dts

   1 #include "mt7628an.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/gpio/gpio.h>
   5
   6 / {
   7         compatible = "wavlink,wl-wn575a3", "mediatek,mt7628an-soc";
   8         model = "Wavlink WL-WN575A3";
   9
  10         keys {
  11                 compatible = "gpio-keys";
  12
  13                 reset {
  14                         label = "reset";
  15                         gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
  16                         linux,code = <KEY_RESTART>;
  17                 };
  18
  19                 wps {
  20                         label = "wps";
  21                         gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
  22                         linux,code = <KEY_WPS_BUTTON>;
  23                 };
  24         };
  25
  26         leds {
  27                 compatible = "gpio-leds";
  28
  29                 wifi-high {
  30                         label = "green:wifi-high";
  31                         gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
  32                 };
  33
  34                 wifi-med {
  35                         label = "green:wifi-med";
  36                         gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
  37                 };
  38
  39                 wifi-low {
  40                         label = "green:wifi-low";
  41                         gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
  42                 };
  43
  44                 wps {
  45                         label = "green:wps";
  46                         gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
  47                 };
  48         };
  49 };
  50
  51 &state_default {
  52         gpio {
  53                 groups = "i2c", "wled_an", "gpio", "refclk", "wdt", "p0led_an";
  54                 function = "gpio";
  55         };
  56 };
  57
  58 &pcie {
  59         status = "okay";
  60 };
  61
  62 &pcie0 {
  63         mt76@0,0 {
  64                 reg = <0x0000 0 0 0 0>;
  65                 mediatek,mtd-eeprom = <&factory 0x8000>;
  66                 ieee80211-freq-limit = <5000000 6000000>;
  67         };
  68 };
  69
  70 &spi0 {
  71         status = "okay";
  72
  73         flash@0 {
  74                 compatible = "jedec,spi-nor";
  75                 reg = <0>;
  76                 spi-max-frequency = <10000000>;
  77
  78                 partitions {
  79                         compatible = "fixed-partitions";
  80                         #address-cells = <1>;
  81                         #size-cells = <1>;
  82
  83                         partition@0 {
  84                                 label = "u-boot";
  85                                 reg = <0x0 0x30000>;
  86                                 read-only;
  87                         };
  88
  89                         partition@30000 {
  90                                 label = "u-boot-env";
  91                                 reg = <0x30000 0x10000>;
  92                                 read-only;
  93                         };
  94
  95                         factory: partition@40000 {
  96                                 label = "factory";
  97                                 reg = <0x40000 0x10000>;
  98                                 read-only;
  99                         };
 100
 101                         partition@50000 {
 102                                 compatible = "denx,uimage";
 103                                 label = "firmware";
 104                                 reg = <0x50000 0x7b0000>;
 105                         };
 106                 };
 107         };
 108 };
 109
 110 &wmac {
 111         status = "okay";
 112
 113         mediatek,mtd-eeprom = <&factory 0x0>;
 114 };
 115
 116 &ethernet {
 117         nvmem-cells = <&macaddr_factory_28>;
 118         nvmem-cell-names = "mac-address";
 119 };
 120
 121 &esw {
 122         mediatek,portmap = <0x2f>;
 123 };
 124
 125 &factory {
 126         compatible = "nvmem-cells";
 127         #address-cells = <1>;
 128         #size-cells = <1>;
 129
 130         macaddr_factory_28: macaddr@28 {
 131                 reg = <0x28 0x6>;
 132         };
 133 };