ramips: ethernet: ralink: use the reset controller api for esw & ephy
[openwrt/openwrt.git] / target / linux / ramips / dts / rt3050.dtsi
1 /dts-v1/;
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
7
8 aliases {
9 spi0 = &spi0;
10 serial0 = &uartlite;
11 };
12
13 cpus {
14 #address-cells = <1>;
15 #size-cells = <0>;
16
17 cpu@0 {
18 compatible = "mips,mips24KEc";
19 reg = <0>;
20 };
21 };
22
23 chosen {
24 bootargs = "console=ttyS0,57600";
25 };
26
27 cpuintc: cpuintc {
28 #address-cells = <0>;
29 #interrupt-cells = <1>;
30 interrupt-controller;
31 compatible = "mti,cpu-interrupt-controller";
32 };
33
34 palmbus: palmbus@10000000 {
35 compatible = "palmbus";
36 reg = <0x10000000 0x200000>;
37 ranges = <0x0 0x10000000 0x1FFFFF>;
38
39 #address-cells = <1>;
40 #size-cells = <1>;
41
42 sysc: sysc@0 {
43 compatible = "ralink,rt3050-sysc", "syscon";
44 reg = <0x0 0x100>;
45 };
46
47 timer: timer@100 {
48 compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
49 reg = <0x100 0x20>;
50
51 interrupt-parent = <&intc>;
52 interrupts = <1>;
53 };
54
55 watchdog: watchdog@120 {
56 compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
57 reg = <0x120 0x10>;
58
59 resets = <&rstctrl 8>;
60 reset-names = "wdt";
61
62 interrupt-parent = <&intc>;
63 interrupts = <1>;
64 };
65
66 intc: intc@200 {
67 compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
68 reg = <0x200 0x100>;
69
70 resets = <&rstctrl 19>;
71 reset-names = "intc";
72
73 interrupt-controller;
74 #interrupt-cells = <1>;
75
76 interrupt-parent = <&cpuintc>;
77 interrupts = <2>;
78 };
79
80 memc: memc@300 {
81 compatible = "ralink,rt3050-memc";
82 reg = <0x300 0x100>;
83
84 resets = <&rstctrl 20>;
85 reset-names = "mc";
86
87 interrupt-parent = <&intc>;
88 interrupts = <3>;
89 };
90
91 uart: uart@500 {
92 compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
93 reg = <0x500 0x100>;
94
95 resets = <&rstctrl 12>;
96 reset-names = "uart";
97
98 interrupt-parent = <&intc>;
99 interrupts = <5>;
100
101 reg-shift = <2>;
102
103 status = "disabled";
104 };
105
106 gpio0: gpio@600 {
107 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
108 reg = <0x600 0x34>;
109
110 gpio-controller;
111 #gpio-cells = <2>;
112
113 ngpios = <24>;
114 ralink,gpio-base = <0>;
115 ralink,register-map = [ 00 04 08 0c
116 20 24 28 2c
117 30 34 ];
118
119 resets = <&rstctrl 13>;
120 reset-names = "pio";
121
122 interrupt-parent = <&intc>;
123 interrupts = <6>;
124 };
125
126 gpio1: gpio@638 {
127 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
128 reg = <0x638 0x24>;
129
130 gpio-controller;
131 #gpio-cells = <2>;
132
133 ngpios = <16>;
134 ralink,gpio-base = <24>;
135 ralink,register-map = [ 00 04 08 0c
136 10 14 18 1c
137 20 24 ];
138
139 status = "disabled";
140 };
141
142 gpio2: gpio@660 {
143 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
144 reg = <0x660 0x24>;
145
146 gpio-controller;
147 #gpio-cells = <2>;
148
149 ngpios = <12>;
150 ralink,gpio-base = <40>;
151 ralink,register-map = [ 00 04 08 0c
152 10 14 18 1c
153 20 24 ];
154
155 status = "disabled";
156 };
157
158 gdma: gdma@700 {
159 compatible = "ralink,rt305x-gdma";
160 reg = <0x700 0x100>;
161
162 resets = <&rstctrl 14>;
163 reset-names = "dma";
164
165 interrupt-parent = <&intc>;
166 interrupts = <7>;
167
168 #dma-cells = <1>;
169 #dma-channels = <8>;
170 #dma-requests = <8>;
171
172 status = "disabled";
173 };
174
175 i2c@900 {
176 compatible = "ralink,rt2880-i2c";
177 reg = <0x900 0x100>;
178
179 resets = <&rstctrl 16>;
180 reset-names = "i2c";
181
182 #address-cells = <1>;
183 #size-cells = <0>;
184
185 status = "disabled";
186
187 pinctrl-names = "default";
188 pinctrl-0 = <&i2c_pins>;
189 };
190
191 i2s@a00 {
192 compatible = "ralink,rt3050-i2s";
193 reg = <0xa00 0x100>;
194
195 resets = <&rstctrl 17>;
196 reset-names = "i2s";
197
198 interrupt-parent = <&intc>;
199 interrupts = <10>;
200
201 txdma-req = <2>;
202
203 dmas = <&gdma 4>;
204 dma-names = "tx";
205
206 status = "disabled";
207 };
208
209 spi0: spi@b00 {
210 compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
211 reg = <0xb00 0x100>;
212
213 resets = <&rstctrl 18>;
214 reset-names = "spi";
215
216 #address-cells = <1>;
217 #size-cells = <0>;
218
219 pinctrl-names = "default";
220 pinctrl-0 = <&spi_pins>;
221
222 status = "disabled";
223 };
224
225 uartlite: uartlite@c00 {
226 compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
227 reg = <0xc00 0x100>;
228
229 resets = <&rstctrl 19>;
230 reset-names = "uartl";
231
232 interrupt-parent = <&intc>;
233 interrupts = <12>;
234
235 reg-shift = <2>;
236
237 pinctrl-names = "default";
238 pinctrl-0 = <&uartlite_pins>;
239 };
240 };
241
242 pinctrl: pinctrl {
243 compatible = "ralink,rt2880-pinmux";
244
245 pinctrl-names = "default";
246 pinctrl-0 = <&state_default>;
247
248 state_default: pinctrl0 {
249 sdram {
250 groups = "sdram";
251 function = "sdram";
252 };
253 };
254
255 i2c_pins: i2c_pins {
256 i2c_pins {
257 groups = "i2c";
258 function = "i2c";
259 };
260 };
261
262 spi_pins: spi_pins {
263 spi_pins {
264 groups = "spi";
265 function = "spi";
266 };
267 };
268
269 rgmii_pins: rgmii {
270 rgmii {
271 groups = "rgmii";
272 function = "rgmii";
273 };
274 };
275
276 uartlite_pins: uartlite {
277 uart {
278 groups = "uartlite";
279 function = "uartlite";
280 };
281 };
282 };
283
284 rstctrl: rstctrl {
285 compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
286 #reset-cells = <1>;
287 };
288
289 clkctrl: clkctrl {
290 compatible = "ralink,rt2880-clock";
291 #clock-cells = <1>;
292 };
293
294 usbphy: usbphy {
295 compatible = "ralink,rt3050-usbphy";
296 #phy-cells = <0>;
297
298 ralink,sysctl = <&sysc>;
299 resets = <&rstctrl 22>;
300 reset-names = "host";
301 clocks = <&clkctrl 18>;
302 clock-names = "host";
303 };
304
305 ethernet: ethernet@10100000 {
306 compatible = "ralink,rt3050-eth";
307 reg = <0x10100000 0x10000>;
308
309 resets = <&rstctrl 21>;
310 reset-names = "fe";
311
312 interrupt-parent = <&cpuintc>;
313 interrupts = <5>;
314
315 mediatek,switch = <&esw>;
316 };
317
318 esw: esw@10110000 {
319 compatible = "ralink,rt3050-esw";
320 reg = <0x10110000 0x8000>;
321
322 resets = <&rstctrl 23 &rstctrl 24>;
323 reset-names = "esw", "ephy";
324
325 interrupt-parent = <&intc>;
326 interrupts = <17>;
327 };
328
329 wmac: wmac@10180000 {
330 compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
331 reg = <0x10180000 0x40000>;
332
333 interrupt-parent = <&cpuintc>;
334 interrupts = <6>;
335
336 ralink,eeprom = "soc_wmac.eeprom";
337 };
338
339 otg: otg@101c0000 {
340 #address-cells = <1>;
341 #size-cells = <0>;
342 compatible = "ralink,rt3050-otg", "snps,dwc2";
343 reg = <0x101c0000 0x40000>;
344
345 interrupt-parent = <&intc>;
346 interrupts = <18>;
347
348 resets = <&rstctrl 22>;
349 reset-names = "otg";
350
351 status = "disabled";
352
353 otg_port1: port@1 {
354 reg = <1>;
355 #trigger-source-cells = <0>;
356 };
357 };
358 };