target/linux/ramips/dts/rt3052_sitecom_wl-351.dts

   1 #include "rt3050.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         compatible = "sitecom,wl-351", "ralink,rt3052-soc";
   8         model = "Sitecom WL-351 v1 002";
   9
  10         aliases {
  11                 led-boot = &led_power;
  12                 led-failsafe = &led_power;
  13                 led-running = &led_power;
  14                 led-upgrade = &led_power;
  15         };
  16
  17         flash@1f000000 {
  18                 compatible = "cfi-flash";
  19                 reg = <0x1f000000 0x800000>;
  20                 bank-width = <2>;
  21                 device-width = <2>;
  22
  23                 partitions {
  24                         compatible = "fixed-partitions";
  25                         #address-cells = <1>;
  26                         #size-cells = <1>;
  27
  28                         partition@0 {
  29                                 label = "u-boot";
  30                                 reg = <0x0 0x30000>;
  31                                 read-only;
  32                         };
  33
  34                         partition@30000 {
  35                                 label = "u-boot-env";
  36                                 reg = <0x30000 0x10000>;
  37                                 read-only;
  38                         };
  39
  40                         factory: partition@40000 {
  41                                 label = "factory";
  42                                 reg = <0x40000 0x10000>;
  43                                 read-only;
  44                         };
  45
  46                         partition@50000 {
  47                                 compatible = "denx,uimage";
  48                                 label = "firmware";
  49                                 reg = <0x50000 0x3b0000>;
  50                         };
  51                 };
  52         };
  53
  54         leds {
  55                 compatible = "gpio-leds";
  56
  57                 led_power: power {
  58                         label = "amber:power";
  59                         gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  60                 };
  61
  62                 unpopulated {
  63                         label = "amber:unpopulated";
  64                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  65                 };
  66
  67                 unpopulated2 {
  68                         label = "blue:unpopulated";
  69                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  70                 };
  71         };
  72
  73         keys {
  74                 compatible = "gpio-keys-polled";
  75                 poll-interval = <20>;
  76
  77                 reset {
  78                         label = "reset";
  79                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  80                         linux,code = <KEY_RESTART>;
  81                 };
  82
  83                 wps {
  84                         label = "wps";
  85                         gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
  86                         linux,code = <KEY_WPS_BUTTON>;
  87                 };
  88         };
  89
  90         rtl8366rb {
  91                 compatible = "realtek,rtl8366rb";
  92                 gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
  93                 gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
  94         };
  95 };
  96
  97 &state_default {
  98         gpio {
  99                 groups = "spi", "i2c", "jtag", "mdio", "uartf";
 100                 function = "gpio";
 101         };
 102 };
 103
 104 &ethernet {
 105         nvmem-cells = <&macaddr_factory_4>;
 106         nvmem-cell-names = "mac-address";
 107         pinctrl-names = "default";
 108         pinctrl-0 = <&rgmii_pins>;
 109 };
 110
 111 &esw {
 112         ralink,rgmii = <1>;
 113         mediatek,portmap = <0x3f>;
 114         ralink,fct2 = <0x0002500c>;
 115         /*
 116          * ext phy base addr 31, rx/tx clock skew 0,
 117          * turbo mii off, rgmi 3.3v off, port 5 polling off
 118          * port5: enabled, gige, full-duplex, rx/tx-flow-control
 119          * port6: enabled, gige, full-duplex, rx/tx-flow-control
 120         */
 121         ralink,fpa2 = <0x1f003fff>;
 122 };
 123
 124 &wmac {
 125         ralink,mtd-eeprom = <&factory 0x0>;
 126 };
 127
 128 &otg {
 129         status = "okay";
 130 };
 131
 132 &factory {
 133         compatible = "nvmem-cells";
 134         #address-cells = <1>;
 135         #size-cells = <1>;
 136
 137         macaddr_factory_4: macaddr@4 {
 138                 reg = <0x4 0x6>;
 139         };
 140 };