ramips: remove useless resets properties from SoC dtsi
[openwrt/openwrt.git] / target / linux / ramips / dts / rt3883_trendnet_tew-692gr.dts
1 #include "rt3883.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "trendnet,tew-692gr", "ralink,rt3883-soc";
8 model = "TRENDnet TEW-692GR";
9
10 aliases {
11 led-boot = &led_wps_green;
12 led-failsafe = &led_wps_green;
13 led-running = &led_wps_green;
14 led-upgrade = &led_wps_green;
15 };
16
17 flash@1c000000 {
18 compatible = "cfi-flash";
19 reg = <0x1c000000 0x800000>;
20 bank-width = <2>;
21
22 partitions {
23 compatible = "fixed-partitions";
24 #address-cells = <1>;
25 #size-cells = <1>;
26
27 partition@0 {
28 reg = <0x0 0x0030000>;
29 label = "u-boot";
30 read-only;
31 };
32
33 partition@30000 {
34 reg = <0x00030000 0x00010000>;
35 label = "u-boot-env";
36 read-only;
37 };
38
39 factory: partition@40000 {
40 reg = <0x00040000 0x00010000>;
41 label = "factory";
42 read-only;
43
44 nvmem-layout {
45 compatible = "fixed-layout";
46 #address-cells = <1>;
47 #size-cells = <1>;
48
49 eeprom_factory_0: eeprom@0 {
50 reg = <0x0 0x200>;
51 };
52
53 macaddr_factory_4: macaddr@4 {
54 compatible = "mac-base";
55 reg = <0x4 0x6>;
56 #nvmem-cell-cells = <1>;
57 };
58 };
59 };
60
61 partition@50000 {
62 compatible = "denx,uimage";
63 reg = <0x00050000 0x007b0000>;
64 label = "firmware";
65 };
66 };
67 };
68
69 keys {
70 compatible = "gpio-keys-polled";
71 poll-interval = <100>;
72
73 reset {
74 label = "reset";
75 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
76 linux,code = <KEY_RESTART>;
77 };
78
79 wps {
80 label = "wps";
81 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
82 linux,code = <KEY_WPS_BUTTON>;
83 };
84 };
85
86 leds {
87 compatible = "gpio-leds";
88
89 wps {
90 label = "orange:wps";
91 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
92 };
93
94 led_wps_green: wps2 {
95 label = "green:wps";
96 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
97 };
98 };
99 };
100
101 &gpio1 {
102 status = "okay";
103 };
104
105 &state_default {
106 gpio {
107 groups = "spi", "i2c", "jtag", "uartf";
108 function = "gpio";
109 };
110 };
111
112 &ethernet {
113 status = "okay";
114 nvmem-cells = <&macaddr_factory_4 0>;
115 nvmem-cell-names = "mac-address";
116
117 port@0 {
118 phy-handle = <&phy0>;
119 phy-mode = "rgmii";
120 };
121
122 mdio-bus {
123 status = "okay";
124
125 phy0: ethernet-phy@0 {
126 reg = <0>;
127 phy-mode = "rgmii";
128
129 qca,ar8327-initvals = <
130 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
131 0x0c 0x07600000 /* PORT6 PAD MODE CTRL */
132 0x10 0x40000000 /* Power-on Strapping: 176-pin interface configuration */
133 0x50 0xc437c437 /* LED Control Register 0 */
134 0x54 0xc337c337 /* LED Control Register 1 */
135 0x58 0x00000000 /* LED Control Register 2 */
136 0x5c 0x03ffff00 /* LED Control Register 3 */
137 0x7c 0x0000007e /* PORT0_STATUS */
138 0x94 0x0000007e /* PORT6 STATUS */
139 >;
140 };
141 };
142 };
143
144 &pci {
145 status = "okay";
146 };
147
148 &pci1 {
149 status = "okay";
150
151 wifi@0,0 {
152 compatible = "pci0,0";
153 reg = < 0x10000 0 0 0 0 >;
154 ralink,2ghz = <0>;
155 };
156 };
157
158 &wmac {
159 ralink,5ghz = <0>;
160 nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_4 3>;
161 nvmem-cell-names = "eeprom", "mac-address";
162 };