target/linux/ramips/patches-3.10/0204-MIPS-74K-1074K-Correct-erratum-workaround.patch

   1 From 3da3528448850ccde412d52fb939575641ada80d Mon Sep 17 00:00:00 2001
   2 From: "Maciej W. Rozycki" <macro@linux-mips.org>
   3 Date: Wed, 18 Sep 2013 19:08:15 +0100
   4 Subject: [PATCH 204/215] MIPS: 74K/1074K: Correct erratum workaround.
   5
   6 Make sure 74K revision numbers are not applied to the 1074K.  Also catch
   7 invalid usage.
   8
   9 Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
  10 Cc: Steven J. Hill <Steven.Hill@imgtec.com>
  11 Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
  12 Cc: linux-mips@linux-mips.org
  13 Patchwork: https://patchwork.linux-mips.org/patch/5857/
  14 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
  15 (cherry picked from commit 9213ad77070ea75fc3a5e43e3d9e9c4146e4930a)
  16 ---
  17  arch/mips/mm/c-r4k.c |   26 ++++++++++++++++++--------
  18  1 file changed, 18 insertions(+), 8 deletions(-)
  19
  20 --- a/arch/mips/mm/c-r4k.c
  21 +++ b/arch/mips/mm/c-r4k.c
  22 @@ -785,20 +785,30 @@ static inline void rm7k_erratum31(void)
  23
  24  static inline void alias_74k_erratum(struct cpuinfo_mips *c)
  25  {
  26 +       unsigned int imp = c->processor_id & 0xff00;
  27 +       unsigned int rev = c->processor_id & PRID_REV_MASK;
  28 +
  29         /*
  30          * Early versions of the 74K do not update the cache tags on a
  31          * vtag miss/ptag hit which can occur in the case of KSEG0/KUSEG
  32          * aliases. In this case it is better to treat the cache as always
  33          * having aliases.
  34          */
  35 -       if ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(2, 4, 0))
  36 -               c->dcache.flags |= MIPS_CACHE_VTAG;
  37 -       if ((c->processor_id & 0xff) == PRID_REV_ENCODE_332(2, 4, 0))
  38 -               write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
  39 -       if (((c->processor_id & 0xff00) == PRID_IMP_1074K) &&
  40 -           ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(1, 1, 0))) {
  41 -               c->dcache.flags |= MIPS_CACHE_VTAG;
  42 -               write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
  43 +       switch (imp) {
  44 +       case PRID_IMP_74K:
  45 +               if (rev <= PRID_REV_ENCODE_332(2, 4, 0))
  46 +                       c->dcache.flags |= MIPS_CACHE_VTAG;
  47 +               if (rev == PRID_REV_ENCODE_332(2, 4, 0))
  48 +                       write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
  49 +               break;
  50 +       case PRID_IMP_1074K:
  51 +               if (rev <= PRID_REV_ENCODE_332(1, 1, 0)) {
  52 +                       c->dcache.flags |= MIPS_CACHE_VTAG;
  53 +                       write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
  54 +               }
  55 +               break;
  56 +       default:
  57 +               BUG();
  58         }
  59  }
  60