kernel: update 3.10 to 3.10.34
[openwrt/openwrt.git] / target / linux / ramips / patches-3.10 / 0217-pinmux-rt2880.patch
1 --- a/arch/mips/ralink/rt288x.c
2 +++ b/arch/mips/ralink/rt288x.c
3 @@ -17,46 +17,27 @@
4 #include <asm/mipsregs.h>
5 #include <asm/mach-ralink/ralink_regs.h>
6 #include <asm/mach-ralink/rt288x.h>
7 +#include <asm/mach-ralink/pinmux.h>
8
9 #include "common.h"
10
11 -static struct ralink_pinmux_grp mode_mux[] = {
12 - {
13 - .name = "i2c",
14 - .mask = RT2880_GPIO_MODE_I2C,
15 - .gpio_first = 1,
16 - .gpio_last = 2,
17 - }, {
18 - .name = "spi",
19 - .mask = RT2880_GPIO_MODE_SPI,
20 - .gpio_first = 3,
21 - .gpio_last = 6,
22 - }, {
23 - .name = "uartlite",
24 - .mask = RT2880_GPIO_MODE_UART0,
25 - .gpio_first = 7,
26 - .gpio_last = 14,
27 - }, {
28 - .name = "jtag",
29 - .mask = RT2880_GPIO_MODE_JTAG,
30 - .gpio_first = 17,
31 - .gpio_last = 21,
32 - }, {
33 - .name = "mdio",
34 - .mask = RT2880_GPIO_MODE_MDIO,
35 - .gpio_first = 22,
36 - .gpio_last = 23,
37 - }, {
38 - .name = "sdram",
39 - .mask = RT2880_GPIO_MODE_SDRAM,
40 - .gpio_first = 24,
41 - .gpio_last = 39,
42 - }, {
43 - .name = "pci",
44 - .mask = RT2880_GPIO_MODE_PCI,
45 - .gpio_first = 40,
46 - .gpio_last = 71,
47 - }, {0}
48 +static struct rt2880_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) };
49 +static struct rt2880_pmx_func spi_func[] = { FUNC("spi", 0, 3, 6) };
50 +static struct rt2880_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 7, 14) };
51 +static struct rt2880_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 21) };
52 +static struct rt2880_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 23) };
53 +static struct rt2880_pmx_func sdram_func[] = { FUNC("sdram", 0, 24, 39) };
54 +static struct rt2880_pmx_func pci_func[] = { FUNC("pci", 0, 40, 71) };
55 +
56 +static struct rt2880_pmx_group rt2880_pinmux_data_act[] = {
57 + GRP("i2c", i2c_func, 1, RT2880_GPIO_MODE_I2C),
58 + GRP("spi", spi_func, 1, RT2880_GPIO_MODE_SPI),
59 + GRP("uartlite", uartlite_func, 1, RT2880_GPIO_MODE_UART0),
60 + GRP("jtag", jtag_func, 1, RT2880_GPIO_MODE_JTAG),
61 + GRP("mdio", mdio_func, 1, RT2880_GPIO_MODE_MDIO),
62 + GRP("sdram", sdram_func, 1, RT2880_GPIO_MODE_SDRAM),
63 + GRP("pci", pci_func, 1, RT2880_GPIO_MODE_PCI),
64 + { 0 }
65 };
66
67 static void rt288x_wdt_reset(void)
68 @@ -69,11 +50,6 @@ static void rt288x_wdt_reset(void)
69 rt_sysc_w32(t, SYSC_REG_CLKCFG);
70 }
71
72 -struct ralink_pinmux rt_gpio_pinmux = {
73 - .mode = mode_mux,
74 - .wdt_reset = rt288x_wdt_reset,
75 -};
76 -
77 void __init ralink_clk_init(void)
78 {
79 unsigned long cpu_rate;
80 @@ -140,4 +116,6 @@ void prom_soc_init(struct ralink_soc_inf
81 soc_info->mem_base = RT2880_SDRAM_BASE;
82 soc_info->mem_size_min = RT2880_MEM_SIZE_MIN;
83 soc_info->mem_size_max = RT2880_MEM_SIZE_MAX;
84 +
85 + rt2880_pinmux_data = rt2880_pinmux_data_act;
86 }