mac80211: make it work with 3.18.12+
[openwrt/openwrt.git] / target / linux / ramips / patches-3.18 / 0111-i2c-MIPS-add-mt7621-I2C-driver.patch
1 Index: linux-3.18.9/drivers/i2c/busses/Kconfig
2 ===================================================================
3 --- linux-3.18.9.orig/drivers/i2c/busses/Kconfig 2015-03-23 15:00:11.730403938 +0800
4 +++ linux-3.18.9/drivers/i2c/busses/Kconfig 2015-03-23 15:00:11.982403926 +0800
5 @@ -714,6 +714,10 @@
6 tristate "Ralink I2C Controller"
7 select OF_I2C
8
9 +config I2C_MT7621
10 + tristate "MT7621 I2C Controller"
11 + select OF_I2C
12 +
13 config HAVE_S3C2410_I2C
14 bool
15 help
16 Index: linux-3.18.9/drivers/i2c/busses/Makefile
17 ===================================================================
18 --- linux-3.18.9.orig/drivers/i2c/busses/Makefile 2015-03-23 15:00:11.730403938 +0800
19 +++ linux-3.18.9/drivers/i2c/busses/Makefile 2015-03-23 15:00:11.982403926 +0800
20 @@ -67,6 +67,7 @@
21 obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
22 obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o
23 obj-$(CONFIG_I2C_RALINK) += i2c-ralink.o
24 +obj-$(CONFIG_I2C_MT7621) += i2c-mt7621.o
25 obj-$(CONFIG_I2C_QUP) += i2c-qup.o
26 obj-$(CONFIG_I2C_RIIC) += i2c-riic.o
27 obj-$(CONFIG_I2C_RK3X) += i2c-rk3x.o
28 Index: linux-3.18.9/drivers/i2c/busses/i2c-mt7621.c
29 ===================================================================
30 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
31 +++ linux-3.18.9/drivers/i2c/busses/i2c-mt7621.c 2015-03-23 16:31:42.684747034 +0800
32 @@ -0,0 +1,303 @@
33 +/*
34 + * drivers/i2c/busses/i2c-mt7621.c
35 + *
36 + * Copyright (C) 2013 Steven Liu <steven_liu@mediatek.com>
37 + *
38 + * Improve driver for i2cdetect from i2c-tools to detect i2c devices on the bus.
39 + * (C) 2014 Sittisak <sittisaks@hotmail.com>
40 + *
41 + * This software is licensed under the terms of the GNU General Public
42 + * License version 2, as published by the Free Software Foundation, and
43 + * may be copied, distributed, and modified under those terms.
44 + *
45 + * This program is distributed in the hope that it will be useful,
46 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
47 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
48 + * GNU General Public License for more details.
49 + *
50 + */
51 +
52 +#include <linux/interrupt.h>
53 +#include <linux/kernel.h>
54 +#include <linux/module.h>
55 +#include <linux/reset.h>
56 +#include <linux/delay.h>
57 +#include <linux/slab.h>
58 +#include <linux/init.h>
59 +#include <linux/errno.h>
60 +#include <linux/platform_device.h>
61 +#include <linux/i2c.h>
62 +#include <linux/io.h>
63 +#include <linux/err.h>
64 +
65 +#include <asm/mach-ralink/ralink_regs.h>
66 +
67 +#define REG_CONFIG_REG 0x00
68 +#define REG_CLKDIV_REG 0x04
69 +#define REG_DEVADDR_REG 0x08
70 +#define REG_ADDR_REG 0x0C
71 +#define REG_DATAOUT_REG 0x10
72 +#define REG_DATAIN_REG 0x14
73 +#define REG_STATUS_REG 0x18
74 +#define REG_STARTXFR_REG 0x1C
75 +#define REG_BYTECNT_REG 0x20
76 +#define REG_SM0_IS_AUTOMODE 0x28
77 +#define REG_SM0CTL0 0x40
78 +
79 +
80 +#define I2C_STARTERR 0x10
81 +#define I2C_ACKERR 0x08
82 +#define I2C_DATARDY 0x04
83 +#define I2C_SDOEMPTY 0x02
84 +#define I2C_BUSY 0x01
85 +
86 +/* I2C_CFG register bit field */
87 +#define I2C_CFG_ADDRLEN_8 (7<<5) /* 8 bits */
88 +#define I2C_CFG_DEVADLEN_7 (6<<2)
89 +#define I2C_CFG_ADDRDIS BIT(1)
90 +#define I2C_CFG_DEVADDIS BIT(0)
91 +
92 +#define I2C_CFG_DEFAULT (I2C_CFG_ADDRLEN_8 | \
93 + I2C_CFG_DEVADLEN_7 | \
94 + I2C_CFG_ADDRDIS)
95 +
96 +#define I2C_RETRY 0x1000
97 +
98 +#define CLKDIV_VALUE 333
99 +#define i2c_busy_loop (CLKDIV_VALUE*30)
100 +
101 +#define READ_CMD 0x01
102 +#define WRITE_CMD 0x00
103 +#define READ_BLOCK 16
104 +
105 +#define SM0_ODRAIN BIT(31)
106 +#define SM0_VSYNC_MODE BIT(28)
107 +#define SM0_CLK_DIV (CLKDIV_VALUE << 16)
108 +#define SM0_WAIT_LEVEL BIT(6)
109 +#define SM0_EN BIT(1)
110 +
111 +#define SM0_CFG_DEFUALT (SM0_ODRAIN | SM0_VSYNC_MODE | \
112 + SM0_CLK_DIV | SM0_WAIT_LEVEL | \
113 + SM0_EN)
114 +/***********************************************************/
115 +
116 +static void __iomem *membase;
117 +static struct i2c_adapter *adapter;
118 +
119 +static void rt_i2c_w32(u32 val, unsigned reg)
120 +{
121 + iowrite32(val, membase + reg);
122 +}
123 +
124 +static u32 rt_i2c_r32(unsigned reg)
125 +{
126 + return ioread32(membase + reg);
127 +}
128 +
129 +static void mt7621_i2c_reset(struct i2c_adapter *a)
130 +{
131 + device_reset(a->dev.parent);
132 +}
133 +static void mt7621_i2c_enable(struct i2c_msg *msg)
134 +{
135 + rt_i2c_w32(msg->addr,REG_DEVADDR_REG);
136 + rt_i2c_w32(0,REG_ADDR_REG);
137 +}
138 +
139 +static void i2c_master_init(struct i2c_adapter *a)
140 +{
141 + mt7621_i2c_reset(a);
142 + rt_i2c_w32(I2C_CFG_DEFAULT,REG_CONFIG_REG);
143 + rt_i2c_w32(SM0_CFG_DEFUALT,REG_SM0CTL0);
144 + rt_i2c_w32(1,REG_SM0_IS_AUTOMODE);//auto mode
145 +}
146 +
147 +
148 +static inline int rt_i2c_wait_rx_done(void)
149 +{
150 + int i=0;
151 + while((!(rt_i2c_r32(REG_STATUS_REG) & I2C_DATARDY)) && (i<i2c_busy_loop))
152 + i++;
153 + if(i>=i2c_busy_loop){
154 + pr_err("err,wait for idle timeout");
155 + return -ETIMEDOUT;
156 + }
157 + return 0;
158 +}
159 +
160 +static inline int rt_i2c_wait_idle(void)
161 +{
162 + int i=0;
163 + while((rt_i2c_r32(REG_STATUS_REG) & I2C_BUSY) && (i<i2c_busy_loop))
164 + i++;
165 + if(i>=i2c_busy_loop){
166 + pr_err("err,wait for idle timeout");
167 + return -ETIMEDOUT;
168 + }
169 + return 0;
170 +}
171 +
172 +static inline int rt_i2c_wait_tx_done(void)
173 +{
174 + int i=0;
175 + while((!(rt_i2c_r32(REG_STATUS_REG) & I2C_SDOEMPTY)) && (i<i2c_busy_loop))
176 + i++;
177 + if(i>=i2c_busy_loop){
178 + pr_err("err,wait for idle timeout");
179 + return -ETIMEDOUT;
180 + }
181 + return 0;
182 +}
183 +
184 +static int rt_i2c_handle_msg(struct i2c_adapter *a, struct i2c_msg* msg)
185 +{
186 + int i = 0, j = 0, pos = 0;
187 + int nblock = msg->len / READ_BLOCK;
188 + int rem = msg->len % READ_BLOCK;
189 +
190 + if (msg->flags & I2C_M_TEN) {
191 + printk("10 bits addr not supported\n");
192 + return -EINVAL;
193 + }
194 +
195 + if (msg->flags & I2C_M_RD) {
196 + for (i = 0; i < nblock; i++) {
197 + if (rt_i2c_wait_idle())
198 + goto err_timeout;
199 + rt_i2c_w32(READ_BLOCK - 1, REG_BYTECNT_REG);
200 + rt_i2c_w32(READ_CMD, REG_STARTXFR_REG);
201 + for (j = 0; j < READ_BLOCK; j++) {
202 + if (rt_i2c_wait_rx_done())
203 + goto err_timeout;
204 + msg->buf[pos++] = rt_i2c_r32(REG_DATAIN_REG);
205 + }
206 + }
207 +
208 + if (rt_i2c_wait_idle())
209 + goto err_timeout;
210 + rt_i2c_w32(rem - 1, REG_BYTECNT_REG);
211 + rt_i2c_w32(READ_CMD, REG_STARTXFR_REG);
212 +
213 + for (i = 0; i < rem; i++) {
214 + if (rt_i2c_wait_rx_done())
215 + goto err_timeout;
216 + msg->buf[pos++] = rt_i2c_r32(REG_DATAIN_REG);
217 + }
218 + } else {
219 + if (rt_i2c_wait_idle())
220 + goto err_timeout;
221 + rt_i2c_w32(msg->len - 1, REG_BYTECNT_REG);
222 + for (i = 0; i < msg->len; i++) {
223 + rt_i2c_w32(msg->buf[i], REG_DATAOUT_REG);
224 + if(i == 0)
225 + rt_i2c_w32(WRITE_CMD, REG_STARTXFR_REG);
226 +
227 + if (rt_i2c_wait_tx_done())
228 + goto err_timeout;
229 + }
230 + }
231 +
232 + return 0;
233 +err_timeout:
234 + return -ETIMEDOUT;
235 +}
236 +
237 +static int rt_i2c_master_xfer(struct i2c_adapter *a, struct i2c_msg *m, int n)
238 +{
239 + int i = 0;
240 + int ret = 0;
241 + i2c_master_init(a);
242 + mt7621_i2c_enable(m);
243 +
244 + for (i = 0; i != n && ret==0; i++) {
245 + ret = rt_i2c_handle_msg(a, &m[i]);
246 + if (ret)
247 + return ret;
248 + }
249 + return i;
250 +}
251 +
252 +static u32 rt_i2c_func(struct i2c_adapter *a)
253 +{
254 + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
255 +}
256 +
257 +static const struct i2c_algorithm rt_i2c_algo = {
258 + .master_xfer = rt_i2c_master_xfer,
259 + .functionality = rt_i2c_func,
260 +};
261 +
262 +static int rt_i2c_probe(struct platform_device *pdev)
263 +{
264 + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
265 + int ret;
266 +
267 + adapter = devm_kzalloc(&pdev->dev,sizeof(struct i2c_adapter), GFP_KERNEL);
268 + if (!adapter) {
269 + dev_err(&pdev->dev, "failed to allocate i2c_adapter\n");
270 + return -ENOMEM;
271 + }
272 + membase = devm_ioremap_resource(&pdev->dev, res);
273 + if (IS_ERR(membase))
274 + return PTR_ERR(membase);
275 +
276 + strlcpy(adapter->name, dev_name(&pdev->dev), sizeof(adapter->name));
277 +
278 + adapter->owner = THIS_MODULE;
279 + adapter->nr = pdev->id;
280 + adapter->timeout = HZ;
281 + adapter->algo = &rt_i2c_algo;
282 + adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
283 + adapter->dev.parent = &pdev->dev;
284 + adapter->dev.of_node = pdev->dev.of_node;
285 +
286 + platform_set_drvdata(pdev, adapter);
287 +
288 + ret = i2c_add_numbered_adapter(adapter);
289 + if (ret)
290 + return ret;
291 +
292 + dev_info(&pdev->dev,"loaded");
293 +
294 + return 0;
295 +}
296 +
297 +static int rt_i2c_remove(struct platform_device *pdev)
298 +{
299 + platform_set_drvdata(pdev, NULL);
300 + return 0;
301 +}
302 +
303 +static const struct of_device_id i2c_rt_dt_ids[] = {
304 + { .compatible = "ralink,i2c-mt7621", },
305 + { /* sentinel */ }
306 +};
307 +
308 +MODULE_DEVICE_TABLE(of, i2c_rt_dt_ids);
309 +
310 +static struct platform_driver rt_i2c_driver = {
311 + .probe = rt_i2c_probe,
312 + .remove = rt_i2c_remove,
313 + .driver = {
314 + .owner = THIS_MODULE,
315 + .name = "i2c-mt7621",
316 + .of_match_table = i2c_rt_dt_ids,
317 + },
318 +};
319 +
320 +static int __init i2c_rt_init (void)
321 +{
322 + return platform_driver_register(&rt_i2c_driver);
323 +}
324 +
325 +static void __exit i2c_rt_exit (void)
326 +{
327 + platform_driver_unregister(&rt_i2c_driver);
328 +}
329 +module_init (i2c_rt_init);
330 +module_exit (i2c_rt_exit);
331 +
332 +MODULE_AUTHOR("Steven Liu <steven_liu@mediatek.com>");
333 +MODULE_DESCRIPTION("MT7621 I2c host driver");
334 +MODULE_LICENSE("GPL");
335 +MODULE_ALIAS("platform:MT7621-I2C");