target/linux/ramips/patches-3.8/0001-MIPS-ralink-adds-include-files.patch

   1 From 72bd3fcd16225f46ca318435a4d8f3f3f154b1bc Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Mon, 21 Jan 2013 18:25:59 +0100
   4 Subject: [PATCH 01/79] MIPS: ralink: adds include files
   5
   6 Before we start adding the platform code we add the common include files.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  10 Patchwork: http://patchwork.linux-mips.org/patch/4893/
  11 ---
  12  arch/mips/include/asm/mach-ralink/ralink_regs.h |   39 ++++++++++++++++++++
  13  arch/mips/include/asm/mach-ralink/war.h         |   25 +++++++++++++
  14  arch/mips/ralink/common.h                       |   44 +++++++++++++++++++++++
  15  3 files changed, 108 insertions(+)
  16  create mode 100644 arch/mips/include/asm/mach-ralink/ralink_regs.h
  17  create mode 100644 arch/mips/include/asm/mach-ralink/war.h
  18  create mode 100644 arch/mips/ralink/common.h
  19
  20 diff --git a/arch/mips/include/asm/mach-ralink/ralink_regs.h b/arch/mips/include/asm/mach-ralink/ralink_regs.h
  21 new file mode 100644
  22 index 0000000..5a508f9
  23 --- /dev/null
  24 +++ b/arch/mips/include/asm/mach-ralink/ralink_regs.h
  25 @@ -0,0 +1,39 @@
  26 +/*
  27 + *  Ralink SoC register definitions
  28 + *
  29 + *  Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  30 + *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
  31 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  32 + *
  33 + *  This program is free software; you can redistribute it and/or modify it
  34 + *  under the terms of the GNU General Public License version 2 as published
  35 + *  by the Free Software Foundation.
  36 + */
  37 +
  38 +#ifndef _RALINK_REGS_H_
  39 +#define _RALINK_REGS_H_
  40 +
  41 +extern __iomem void *rt_sysc_membase;
  42 +extern __iomem void *rt_memc_membase;
  43 +
  44 +static inline void rt_sysc_w32(u32 val, unsigned reg)
  45 +{
  46 +       __raw_writel(val, rt_sysc_membase + reg);
  47 +}
  48 +
  49 +static inline u32 rt_sysc_r32(unsigned reg)
  50 +{
  51 +       return __raw_readl(rt_sysc_membase + reg);
  52 +}
  53 +
  54 +static inline void rt_memc_w32(u32 val, unsigned reg)
  55 +{
  56 +       __raw_writel(val, rt_memc_membase + reg);
  57 +}
  58 +
  59 +static inline u32 rt_memc_r32(unsigned reg)
  60 +{
  61 +       return __raw_readl(rt_memc_membase + reg);
  62 +}
  63 +
  64 +#endif /* _RALINK_REGS_H_ */
  65 diff --git a/arch/mips/include/asm/mach-ralink/war.h b/arch/mips/include/asm/mach-ralink/war.h
  66 new file mode 100644
  67 index 0000000..a7b712c
  68 --- /dev/null
  69 +++ b/arch/mips/include/asm/mach-ralink/war.h
  70 @@ -0,0 +1,25 @@
  71 +/*
  72 + * This file is subject to the terms and conditions of the GNU General Public
  73 + * License.  See the file "COPYING" in the main directory of this archive
  74 + * for more details.
  75 + *
  76 + * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
  77 + */
  78 +#ifndef __ASM_MACH_RALINK_WAR_H
  79 +#define __ASM_MACH_RALINK_WAR_H
  80 +
  81 +#define R4600_V1_INDEX_ICACHEOP_WAR    0
  82 +#define R4600_V1_HIT_CACHEOP_WAR       0
  83 +#define R4600_V2_HIT_CACHEOP_WAR       0
  84 +#define R5432_CP0_INTERRUPT_WAR                0
  85 +#define BCM1250_M3_WAR                 0
  86 +#define SIBYTE_1956_WAR                        0
  87 +#define MIPS4K_ICACHE_REFILL_WAR       0
  88 +#define MIPS_CACHE_SYNC_WAR            0
  89 +#define TX49XX_ICACHE_INDEX_INV_WAR    0
  90 +#define RM9000_CDEX_SMP_WAR            0
  91 +#define ICACHE_REFILLS_WORKAROUND_WAR  0
  92 +#define R10000_LLSC_WAR                        0
  93 +#define MIPS34K_MISSED_ITLB_WAR                0
  94 +
  95 +#endif /* __ASM_MACH_RALINK_WAR_H */
  96 diff --git a/arch/mips/ralink/common.h b/arch/mips/ralink/common.h
  97 new file mode 100644
  98 index 0000000..3009903
  99 --- /dev/null
 100 +++ b/arch/mips/ralink/common.h
 101 @@ -0,0 +1,44 @@
 102 +/*
 103 + *  This program is free software; you can redistribute it and/or modify it
 104 + *  under the terms of the GNU General Public License version 2 as published
 105 + *  by the Free Software Foundation.
 106 + *
 107 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
 108 + */
 109 +
 110 +#ifndef _RALINK_COMMON_H__
 111 +#define _RALINK_COMMON_H__
 112 +
 113 +#define RAMIPS_SYS_TYPE_LEN    32
 114 +
 115 +struct ralink_pinmux_grp {
 116 +       const char *name;
 117 +       u32 mask;
 118 +       int gpio_first;
 119 +       int gpio_last;
 120 +};
 121 +
 122 +struct ralink_pinmux {
 123 +       struct ralink_pinmux_grp *mode;
 124 +       struct ralink_pinmux_grp *uart;
 125 +       int uart_shift;
 126 +       void (*wdt_reset)(void);
 127 +};
 128 +extern struct ralink_pinmux gpio_pinmux;
 129 +
 130 +struct ralink_soc_info {
 131 +       unsigned char sys_type[RAMIPS_SYS_TYPE_LEN];
 132 +       unsigned char *compatible;
 133 +};
 134 +extern struct ralink_soc_info soc_info;
 135 +
 136 +extern void ralink_of_remap(void);
 137 +
 138 +extern void ralink_clk_init(void);
 139 +extern void ralink_clk_add(const char *dev, unsigned long rate);
 140 +
 141 +extern void prom_soc_init(struct ralink_soc_info *soc_info);
 142 +
 143 +__iomem void *plat_of_remap_node(const char *node);
 144 +
 145 +#endif /* _RALINK_COMMON_H__ */
 146 --
 147 1.7.10.4
 148